rtems_semaphore_obtain

[Joel Sherrill]

Johan Zandin wrote:
> Sergei Organov  writes:
>   
>> "Johan Zandin" <johan.zandin at space.se> writes:
>>     
>>>        _Context_Switch( &executing->Registers, &heir->Registers );
>>>
>>>        executing = _Thread_Executing;
>>>
>>>        _ISR_Disable( level );         -----+
>>>                                            |  Region where
>>>     }                                      |  an occuring 
>>>                                            |  interrupt
>>>      _Thread_Dispatch_disable_level = 0;   |  causes problems
>>>                                            |
>>>      _ISR_Enable( level );            -----+
>>>       
>
>   
>> But how interrupt can occur when it's disabled in this region?! If
>> _ISR_Disable()/_ISR_Enable() don't work on your target, you have hard
>> trouble anyway.
>>     
>
> The HW interrupt occurs but is left pending until ISRs are enabled,
> so the ISR does not execute until somewhere within the _ISR_Enable call
> (in the first cycle when ISRs are enabled in the CPU again).
>
>   
In the failure case I see, it is executed around the 3rd instruction of
c/src/lib/libcpu/sparc/syscall/syscall.S.  This holds true for your
executable, as well as ones I have built for

  + head of 4.6 branch
  + head of 4.7 branch
  + 4.7 branch with events

I thought there are some assumptions about what doing a syscall
guarantees us and it doesn't look like it is happening in this case.
But that's just my memory. Let's see what Jiri says. :)

--joel
> /Johan
>
> -----------------------------------------------------------
> Johan Zandin                      Software Engineer
> Saab Space AB                     Phone: +46-31-735 41 47
> SE-405 15 Gothenburg, Sweden      Fax:   +46-31-735 40 00
> -----------------------------------------------------------
>
>
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