RTEMS stack + TSIM-LEON2 weird behaviour

[Joel Sherrill]

Jiri.. can you comment on my question below..
Aitor Viana wrote:
> Actually it is not completely off-topic, I tell you why...
>
> If I disassemble the executable and go to the hard_reset function:
>
> 40001000 <hard_reset>:
> 40001000:       03 10 00 00     sethi  %hi(0x40000000), %g1
> 40001004:       82 10 60 00     mov  %g1, %g1   ! 40000000 <RAM_START>
> 40001008:       81 98 40 00     mov  %g1, %tbr
> 4000100c:       83 48 00 00     rd  %psr, %g1
> 40001010:       84 00 60 01     add  %g1, 1, %g2
> 40001014:       84 08 a0 07     and  %g2, 7, %g2
> 40001018:       86 10 20 01     mov  1, %g3
> 4000101c:       87 28 c0 02     sll  %g3, %g2, %g3
> 40001020:       81 90 c0 00     mov  %g3, %wim
> 40001024:       82 10 60 20     or  %g1, 0x20, %g1
> 40001028:       81 88 40 00     mov  %g1, %psr
> 4000102c:       01 00 00 00     nop
> 40001030:       01 00 00 00     nop
> 40001034:       01 00 00 00     nop
> 40001038:       0d 10 00 01     sethi  %hi(0x40000400), %g6
> 4000103c:       8c 11 a3 c0     or  %g6, 0x3c0, %g6     ! 400007c0 
> <_ERC32_MEC_Timer_Control_Mirror>
> *40001040:       dc 21 80 00     st  %sp, [ %g6 ]*
> 40001044:       23 10 00 4a     sethi  %hi(0x40012800), %l1
> 40001048:       a2 14 61 64     or  %l1, 0x164, %l1     ! 40012964 
> <Configuration>
> 4000104c:       e6 04 60 04     ld  [ %l1 + 4 ], %l3
> *40001050:       9c 23 80 13     sub  %sp, %l3, %sp
> 40001054:       9c 2b a0 0f     andn  %sp, 0xf, %sp
> 40001058:       bc 10 00 0e     mov  %sp, %fp
> *4000105c:       01 00 00 00     nop
> 40001060:       05 10 00 4a     sethi  %hi(0x40012800), %g2
> 40001064:       84 10 a0 a0     or  %g2, 0xa0, %g2      ! 400128a0 
> <_endtext>
> 40001068:       07 10 00 4a     sethi  %hi(0x40012800), %g3
> 4000106c:       86 10 e0 a0     or  %g3, 0xa0, %g3      ! 400128a0 
> <_endtext>
> 40001070:       09 10 00 4d     sethi  %hi(0x40013400), %g4
> 40001074:       88 11 22 70     or  %g4, 0x270, %g4     ! 40013670 
> <__bss_start>
> 40001078:       80 a0 80 03     cmp  %g2, %g3
> 4000107c:       02 80 00 09     be  400010a0 <copy_data+0x1c>
> 40001080:       01 00 00 00     nop
>
>
> Find in bold where the %sp is modified. There is not single 
> instruction to set up the %sp register. The first one stores the VALUE 
> of the %sp into the address pointed by %g6, and the next operation 
> over the %sp subtract fro %sp, so the %sp value should be 0xFFFFXXXX 
> ??? and this is RTEMS business.
>
> Again the question is where the %sp is set, in RTEMS ?
The initial value of %sp seens to be 0 on the sparc configurations I have.
So the sub instruction you highlighted above would set the %sp to
the area below the work space. 

This code hasn't changed in a LONG time and makes assumptions about
the execution environment which I cannot personally guarantee.  Jiri
would be able to do so.

My first thought this morning is that this may have been a valid assumption
at one time (initial %sp is 0) but with more variations and starting 
environments,
it may not be valid anymore.  I would guess that the "sub" statement would
be better changed to a "mov %l3, %sp" and ignore the inherited %sp.
>
> the ./lib/libbsp/sparc/shared/start.S file matches with the 
> disassemble code...
>
>
> On Tue, May 6, 2008 at 11:41 AM, Ralf Corsepius 
> <ralf.corsepius at rtems.org <mailto:ralf.corsepius at rtems.org>> wrote:
>
>
>     On Tue, 2008-05-06 at 10:16 +0200, Aitor.Viana.Sanchez at esa.int
>     <mailto:Aitor.Viana.Sanchez at esa.int> wrote:
>     >
>     > Hi all,
>     >
>     > I've got some weird (for me) when executing the rtems-hello
>     example in
>     > the tsim-leon2 professional version.
>
>     Off topic for this list - Ask Gaisler.
>
>     Ralf
>
>
>
>


-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
   Support Available             (256) 722-9985