A question about the irq handler of the arm core
gds at chartertn.net
Thu Sep 11 15:15:18 UTC 2008
> I attach a piece of code from the file $(RTEMS-4.7.3)/c/src/lib/
> its the ISR handler of ARM core.
> In the line 59 to 62, it judge whether the arm core is in irq mode,
> if so - exit the isr handler and return to normal program
> else - go on to do some more work and return
> But its impossible to call this function in normal program
> except an interrupt really happen.
> If so, the arm core is sure to be in the irq mode,
> the code from line 63 to 128 seems would never be executed.
> Could the maintainer of ARM explain it?
> I was so confused.
> 58 /* check to see if we interrupted nd INT (with FIQ?) */
> 59 mrs r0, spsr
> 60 and r0, r0, #0x1f
> 61 cmp r0, #0x12 /* is it INT mode? */
> 62 beq exitit
I am not the "maintainer" or even an expert on ARM but I have noticed
this section of code too since I am also working on an ARM project now.
I think it is saying look at where you were *before* the current IRQ
occurred and if this IRQ interrupted another IRQ (or FIQ) then get out.
This is determined by looking at the "stored" processor status register
(SPSR). Since the ARM funnels all IRQs thought one function
(_IRQ_Handler or rtems) it is unclear to me if this function can be
reentered by another IRQ. Also, not sure that a FIQ can occur during an
IRQ but the comment implies that it can. I am looking at the ARM
reference manual as we speak...
More information about the users