rtems 4.8 / erc32 bsp / register allocation / FP registers for non FP operations

[Nicolas Horro]

Hello,

I noticed a strange behaviour in sparc-rtems4.8-gcc. In rare
occasions, when generating code for 32bit unsigned integer accesseses
it uses %f8 register, which is a FPU register.

This causes an undesired trap, because FP is disabled:

_____________________________
calling foo()
Unexpected trap 0x4 at 0x2001ce0
FP disabled.
_____________________________

Depending on minor changes in source code, this can be the output:

02001cd0 <foo>:
 2001cd0:	03 00 7e 00 	sethi  %hi(0x1f80000), %g1     ;ERC32_MEC> base address
 2001cd4:	c6 02 a0 04 	ld  [ %o2 + 4 ], %g3
 2001cd8:	9a 10 60 00 	mov  %g1, %o5                     ; %g5 =
0x1f8004c (INTERRUPT MASK REGISTER)
 2001cdc:	17 00 80 6c 	sethi  %hi(0x201b000), %o3
 2001ce0:	d1 03 60 4c 	ld  [ %o5 + 0x4c ], %f8           ; <--- why %F8 ????
 2001ce4:	c4 02 e1 d4 	ld  [ %o3 + 0x1d4 ], %g2
(....)

for c source code:

void foo() {
   uint32_t intMask = ERC32_MEC.Interrupt_Mask;
    /* (...) */
   ERC32_MEC.Interrupt_Mask = ERC32_MEC.Interrupt_Mask | 0x00007ffc;
    /* (...) */
}

I could not detect yet which is the combination of changes that
generate the use of %f8 register. Only uint8_t, uint16_t and uint32_t
types are used (there are no floats, doubles, uint64_ts.).

Default Makefiles for ERC32 BSP are used RTEMS 4.8.0. This function is
part of a I/O driver.
Configure options are:

cd bsp-install
../rtems4.8.0/configure --target=sparc-rtems4.8
--enable-rtemsbsp="erc32 sis" --enable-posix --disable-itron
--disable-networking --disable-cxx --disable-tests
--disable-rtems-debug --disable-docs --prefix=/home/bsp-install &&
gmake all && make install

Any direction of where to get more information on register usage or
could this be a bug?

Thanks in advance,

Nicolás