ERC32 clock counter incorrect
SERONIE VIVIEN, Jacques
jacques.seronievivien at astrium.eads.net
Mon Mar 9 13:39:56 UTC 2009
I just checked ATMEL TSC695F (ERC32) documentation. The formula given to
compute the duration of the timer does not require a "-1" on the counter
register (only on the scaler). The documentation states that if the
counter register is set to 0, the timer is stopped (no interrupt is
generated), this would not consistent with the "-1".
But as documentation can contain errors, I would be interested in the
actual tests you performed to find that the "-1" is required.
Regards.
PS: Documentations for LEON2 and LEON3 are differents and clearly
require the "-1" as it is sait that the timer interrupt is generated
when the counter underflows.
Ce courriel (incluant ses eventuelles pieces jointes) peut contenir des informations confidentielles et/ou protegees ou dont la diffusion est restreinte. Si vous avez recu ce courriel par erreur, vous ne devez ni le copier, ni l'utiliser, ni en divulguer le contenu a quiconque. Merci d'en avertir immediatement l'expediteur et d'effacer ce courriel de votre systeme. Astrium decline toute responsabilite en cas de corruption par virus, d'alteration ou de falsification de ce courriel lors de sa transmission par voie electronique.
This email (including any attachments) may contain confidential and/or privileged information or information otherwise protected from disclosure. If you are not the intended recipient, please notify the sender immediately, do not copy this message or any attachments and do not use it for any purpose or disclose its content to any person, but delete this message and any attachments from your system. Astrium disclaims any and all liability if this email transmission was virus corrupted, altered or falsified.
---------------------------------------------------------------------
Astrium SAS (393 341 516 RCS Paris) - Siege social: 6 rue Laurent Pichat, 75016 Paris, France
More information about the users
mailing list