strauman at slac.stanford.edu
Tue Nov 10 07:20:08 UTC 2009
I added a straightforward but *experimental* implementation of
SSE support to HEAD.
It is activated if the cpukit and BSP (currently only pc386 BSP
variants are supported) are compiled with __SSE__ defined.
The __SSE__ cpp symbol is defined by the -msse (and other, see
gcc documentation) gcc options. I.e., when using the traditional
pc386 BSP variants (pc486, pc586 etc.) SSE support is *disabled*.
A new BSP variant 'pc586-sse' has been added which activates
- Changes activated by __SSE__ are quite small (only a few files
under cpukit/score/cpu/i386/ and c/lib/libbsp/i386/ are affected)
(search ChangeLog files in these two directories for 'SSE').
- Read comments in
- i386 BSPs other than pc386 derivatives need minor changes to enable
SSE during early startup.
- the FPU control register and MXCSR are maintained/switched 'per-task'.
The i386 ABI is very simple: all FP and SSE registers are volatile.
This means that we need to save/restore them only across exceptions
and interrupts and this is exactly what the SSE support does.
I found that saving/restoring the full FP and SSE context
('fxsave'/'fxrstor' instructions) are fast; thus using
these instructions when handling exceptions/interrupts is
easy and efficient. The benefit is that even ISRs may use
SSE and/or the FPU (gcc sometimes uses either implicitly)
and that no unnecessary overhead is incurred when switching
context for reasons other than interrupts/exceptions.
FP context switching was changed - it is now (i.e., if and only if
__SSE__ is defined) done simultaneously with SSE context switching
across IRQs/exceptions *only*.
An 'ordinary' (not irq/exc caused) task switch only switches
the FPU control word and MXCSR.
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