PowerPC context switch question
Thomas Dörfler
Thomas.Doerfler at embedded-brains.de
Wed Oct 14 07:59:35 UTC 2009
Peter,
the reason for the stwu is the "dcbz" instruction following it. Since
this instruction (presumably) does not allow "reg + offset" addressing,
it is important that r3 really points to an address that lies in the
corresponding data cache line. Therefore it is explicitly updated with
"stwu" and the offsets of the following accesses are adjusted.
dcbz avoids to read the memory area for the following registers from
external memory, because this area will be overwritten anyway.
wkr,
Thomas.
Peter Dufault wrote:
> What does the stwu/ldzu do for us in _CPU_Context_switch()? I know what
> it's doing, I'm interested in knowing why.
> I assume it's setting up for the upcoming dcbz, right? Why do we do the
> dcbz there? The next instruction won't start pulling that in anyway?
> Are there alignment assumptions on the context area?
>
> That sudden switch to "OFFSET-GP_18" had me puzzled for a while.
>
> Peter
>
>
> _______________________________________________
> rtems-users mailing list
> rtems-users at rtems.org
> http://www.rtems.org/mailman/listinfo/rtems-users
--
--------------------------------------------
Embedded Brains GmbH
Thomas Doerfler Obere Lagerstrasse 30
D-82178 Puchheim Germany
email: Thomas.Doerfler at embedded-brains.de
Phone: +49-89-18908079-2
Fax: +49-89-18908079-9
More information about the users
mailing list