Cortex-M3 support?

[Renato Caldas]

Hello,

On Wed, 29 Jul 2009 11:25:41 +0800, xu ray <rayx.cn at gmail.com> wrote:
> 2009/7/29 Mike Panetta <mprtems at bellsouth.net>
>
>> ----- Original Message ----
>> > From: Joel Sherrill <joel.sherrill at oarcorp.com>
>> > To: Mike Panetta <mprtems at bellsouth.net>; "rtems-users at rtems.org" <
>> rtems-users at rtems.org>
>> > Sent: Friday, July 24, 2009 10:41:21 AM
>> > Subject: Re: Cortex-M3 support?
>> >
>> > Sebastian Huber has been reworking the ARM exception code so
>> > make sure you are on today's head and talking to him.
>>
>> I don't have his email address, should it be in the list archives?
>> He has not posted recently in reply to this message, so I am
>> not quite sure how to contact him.
>>
>
> Add Sebastian Huber in the loop. He might be busy with LPC porting now.
>
>
>>
>> >
>> > In general terms, you want to start with the CPU core and
>> > ignore the peripherals.
>> >
>> > + make sure the multilib variant is in the tools
>> > + make sure the multilib variant is properly supported
>> >    by cpukit/score/arm and the libnetworking cksum routines.
>>
>> Its in the tools, but the score code seems to be dependent on
>> non thumb ASM so it will not compile for the Cortex-M3.
>>
>> Specifically the context switching code is explicitly in ARM mode.
>>
>
> You can refer to make/custom/rtl22xx_t.cfg and rtl22xx_t BSP. This is a
> Thumb BSP. Try the "-mcpu=cortex-m3 -mthumb" flag for cortext-m3. I think no
> one have ever tried the cortex-m3 flag with rtems tool chain yet, hoping it
> works for you. Btw, minimum code size for rtl22xx_t is about 16K with 2K
> .bss/.data space, and the binary removed the  filesystem and libc overhead.
> What is your requirement for RAM and ROM space?
>
> For the assembly code. The cortex family does not need to change to ARM mode
> when run the privilege instructions. So you can change the mode switch macro
> like align.  Furthermore, cortex adds some registers like basepri, psp which
> is critical to the thread switch. You will have to add code to handle these.
>
>
>
>>
>> >
>> > If you have a non-RTEMS "no OS" arm-elf toolset which can
>> > produce working executables for you, then you are almost
>> > ready for a very minimal BSP.
>> >
>> > + Use the linker script as base with additions for
>> >    workspace related symbols
>> > + Use the crt0.S from it (change call main -> boot_card)
>> > + implement a polled console using the libgloss support.
>> > + Use the "dummy idle task clock driver"
>>
>> As soon as I can figure the best way to get the score code to
>> compile that will be my next step, using the rtems supplied tools. :)
>>
>> >
>> > At the moment, I think the avr, m32c, adn m32r BSPs are the closest
>> > examples to this minimal point.
>> >
>> > That gives you enough to run tests with no interrupts.
>> >
>> > Sebastian will need to step in for exception processing.
>>
>> Waiting to hear from him.

Any news from this?

Cheers,
  Renato

>>
>> Thanks again,
>> Mike
>>
>> >
>> > -- Joel Sherrill, Ph.D.             Director of Research & Development
>> > joel.sherrill at OARcorp.com        On-Line Applications Research
>> > Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>> >   Support Available             (256) 722-9985
>>
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>
>
>
> --
> Thanks & Best Regards!
>
> Ray, Xu
> PEP Technology
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