Issue with Partition Alignment for ARM in 4.10

[Sebastian Huber]

On 04/12/2011 04:39 AM, Kirspel, Kevin wrote:
> The CPU_PARTITION_ALIGNMENT for ARM has been changed from 4 to 8 bytes
> in the latest 4.10 release.

http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/IHI0042D_aapcs.pdf

Yes, this is in accordance to AAPCS section 5.2.1.2
"Stack constraints at a public interface".

The constraint for the CPU_ALIGNMENT and CPU_HEAP_ALIGNMENT is section 4.1
"Fundamental Data Types" table 1, e.g. a double *d = malloc(sizeof(double))
must be possible.

> When creating a partition , the buffer size
> must be a multiple of this value.  The GCC compiler does not generate
> structures sizes that are multiples of 8.

This is all right.

> The following call fails with RTEMS_INVALID_SIZE due to the multiple of
> 8 requirement.  In the example, sizeof(state_event_t) is 12 bytes:
> 
> rtems_partition_create(name, starting_addr, sizeof( state_event_t ) *
> 4096, sizeof( state_event_t ), RTEMS_LOCAL, &id );
> 
>  
> 
> The CPU_STACK_ALIGNMENT for ARM should be set to 8 but I am not sure
> about the others: CPU_ALIGNMENT, CPU_HEAP_ALIGNMENT, and
> CPU_PARTITION_ALIGNMENT.  The call above should be allowed.

In of section 4.3.1 "Aggregates" we have:

 o The alignment of an aggregate shall be the alignment of its most-aligned
   component.

 o The size of an aggregate shall be the smallest multiple of its alignment
   that is sufficient to hold all of its members when they are laid out
   according to these rules.

Thus it should be sufficient to set CPU_PARTITION_ALIGNMENT to 4 (we need 4 due
to implementation constraints).

-- 
Sebastian Huber, embedded brains GmbH

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