ARM Interrupts

Manne Tallmarken mannet at kth.se
Wed Jul 13 18:50:22 UTC 2011


I guess PR stands for patch request... here it is:

Index: c/src/lib/libcpu/arm/at91rm9200/irq/irq.c
===================================================================
--- c/src/lib/libcpu/arm/at91rm9200/irq/irq.c      2011-07-13 16:34:37.000000000 +0200
+++ c/src/lib/libcpu/arm/at91rm9200/irq/irq.c   2011-07-13 20:11:29.000000000 +0200
@@ -21,7 +21,7 @@
 
 void bsp_interrupt_dispatch(void)
 {
-  rtems_vector_number vector = AIC_CTL_REG(AIC_ISR);
+  rtems_vector_number vector = AIC_CTL_REG(AIC_IVR);
 
   bsp_interrupt_handler_dispatch(vector);
 
@@ -44,6 +44,12 @@
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
 {
+  unsigned long i = 0;
+
+  for (i = 0; i < 32; ++i) {
+    AIC_SVR_REG(i<<2) = i;
+  }
+
   /* disable all interrupts */
   AIC_CTL_REG(AIC_IDCR) = 0xffffffff;

--

-Manne
________________________________________
From: Joel Sherrill [joel.sherrill at oarcorp.com]
Sent: Wednesday, July 13, 2011 20:23
To: Manne Tallmarken
Cc: Sebastian Huber; rtems-users at rtems.org
Subject: Re: ARM Interrupts

Manne, can you file a PR?

With the patch that works for you with 4.10.

Sebastian.. does this apply to the head as well?

This needs to be in 4.10.1

Thanks.

--joel

On 07/13/2011 01:12 PM, Manne Tallmarken wrote:
> The patch worked excellent, with one minor change: In the initialization routine, the for loop should set source vector registers on a four byte alignment.
> That is, change
> for (i = 0; i<  32; ++i) {
>    AIC_SVR_REG(i) = i;
> }
>
> to
>
> for (i = 0; i<  32; ++i) {
>    AIC_SVR_REG(i<<2) = i;
> }
>
> Thanks for the patch. :-)
> -Manne
>
> ________________________________________
> From: rtems-users-bounces at rtems.org [rtems-users-bounces at rtems.org] on behalf of Sebastian Huber [sebastian.huber at embedded-brains.de]
> Sent: Wednesday, July 13, 2011 09:06
> To: rtems-users at rtems.org
> Subject: Re: ARM Interrupts
>
> Can you please test this patch:
>
> Index: c/src/lib/libcpu/arm/at91rm9200/irq/irq.c
> ===================================================================
> --- c/src/lib/libcpu/arm/at91rm9200/irq/irq.c   (revision 5018)
> +++ c/src/lib/libcpu/arm/at91rm9200/irq/irq.c   (working copy)
> @@ -21,7 +21,7 @@
>
>   void bsp_interrupt_dispatch(void)
>   {
> -  rtems_vector_number vector = AIC_CTL_REG(AIC_ISR);
> +  rtems_vector_number vector = AIC_CTL_REG(AIC_IVR);
>
>     bsp_interrupt_handler_dispatch(vector);
>
> @@ -44,6 +44,12 @@
>
>   rtems_status_code bsp_interrupt_facility_initialize(void)
>   {
> +  unsigned long i = 0;
> +
> +  for (i = 0; i<  32; ++i) {
> +    AIC_SVR_REG(i) = i;
> +  }
> +
>     /* disable all interrupts */
>     AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
>
> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
> Phone   : +49 89 18 90 80 79-6
> Fax     : +49 89 18 90 80 79-9
> E-Mail  : sebastian.huber at embedded-brains.de
> PGP     : Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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>
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--
Joel Sherrill, Ph.D.             Director of Research&  Development
joel.sherrill at OARcorp.com        On-Line Applications Research
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