Coldfire (MCF5235) Interrupt Problem

[Ivica Eftimovski]

Well it was self-inflicted wound. I found that my Data Direction Register setting was incorrect (MCF5235_EPORT_EPDDR). It was supposed to be NOT(), and it is supposed to be 8bits, not 16 bits as the User Manual has it. RTEMS has it correctly set to 8bits.

Thank you all for the time and help.

Regards,

Ivica


From: rtems-users-bounces at rtems.org [mailto:rtems-users-bounces at rtems.org] On Behalf Of Ivica Eftimovski
Sent: Friday, May 11, 2012 11:56 AM
To: rtems-users at rtems.org
Subject: Coldfire (MCF5235) Interrupt Problem

Hi all,

I am just starting with RTEMS and I am trying to interface the MCF5235 BCC board to our existing hardware. I am trying to set it to use *IRQ4, which should have fixed level/priority.

When I execute the code noted below, the interrupts are disabled properly, the vector seems set and interrupts are re-enabled. But anytime I ground*IRQ4 (default high) line while my example program is running, I do not vector to the ISR.

I fashioned my code using the clock/network/console code as guide, and those work great.

Can anyone please give me a hint of what am I doing wrong?

------------------------------------- CODE -------------------------------------
#define TPU_INT_VECTOR (64+4)
#define TPU_IRQ_LEVEL  4
#define TPU_IRQ_PRIORITY 4

void InitTPUInterrupt(void);
static rtems_isr TPUInterruptHandler(rtems_vector_number vector);


#define TPUInterruptSetPriority()                            \
     do {                                                     \
           MCF5235_INTC0_ICR4 =                                 \
                MCF5235_INTC_ICR_IL(TPU_IRQ_LEVEL) |             \
                MCF5235_INTC_ICR_IP(TPU_IRQ_PRIORITY);           \
     } while(0)


#define TPUInterruptSetHandler(_level,_vector,_old_handler)  \
     do {                                                     \
           rtems_interrupt_disable(_level);                     \
           MCF5235_INTC0_IMRL &= ~(MCF5235_INTC0_IMRL_INT4 |    \
                     MCF5235_INTC0_IMRL_MASKALL);                 \
           handle_status = rtems_interrupt_catch(TPUInterruptHandler, \
                     TPU_INT_VECTOR, &old_handler); \
           rtems_interrupt_enable(level);                       \
     } while(0)



void InitTPUInterrupt(void) {

     rtems_interrupt_level level;
     rtems_isr_entry old_handler;

     uint16 status;

     TPUInterruptSetPriority();

     TPUInterruptSetHandler(level, TPU_INT_VECTOR, old_handler);

     asm ("move.w  %%sr ,%0;" : "=r"(status));

}

static rtems_isr
TPUInterruptHandler(rtems_vector_number vector)
{
     uint volatile chan = vector - TPU_INT_VECTOR;

     printf("\nGot interrupt number: %i", chan);

    rtems_interrupt_clear(MCF5235_INTC0_ICR4);
}


rtems_task Init(
  rtems_task_argument ignored
)
{
     ....

     InitTPUInterrupt();

     ...
}
------------------------------------- CODE -------------------------------------




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