FLOATING POINT with rtems

[Sebastian Huber]

On 2013-12-02 10:02, Jiri Gaisler wrote:
>
> On 12/02/2013 09:32 AM, Sebastian Huber wrote:
>> >Hello,
>> >
>> >yes, this approach works, but I wouldn't do it that way.  Maybe we should add floating-point enable BSP variants?  For example a "leon3_fpu" BSP?
>> >
> The SPARC FPU issue has been discussed several times on the list.
> One of the problems in the past was that gcc could use %fp registers
> for integer operations (!), unless -msoft-float was used. This
> will obviously break the kernel. Newer gcc versions might have changed
> behaviour, but I am not sure. My proposal was to always compile
> the kernel with SPARC_HAS_FPU=1,*and*  -msoft-float. If a system
> has an FPU, the application will be compiled without -msoft-float
> and the %fp registers will be properly saved since SPARC_HAS_FPU=1.
> If a system does not have an FPU, the application should be compiled
> with -msoft-float,*and*  RTEMS_FLOATING_POINT should NOT be added
> to the task attributes. Soft-float will use integer registers,
> and the %fp saving code will never be invoked.
>
> In this way the same bsp can be used for both FPU/non-FPU system,
> and we also guarantee that no %fp registers are used by gcc in
> kernel or non-FPU tasks.

Recent GCCs will use (at least on PowerPC and ARM) floating point registers for 
integer operations if the register pressure is high for example.  So this 
separate integer/floating point context is an anachronism on these targets. 
Due to this the VFP/Neon on ARM and the SPE/Altivec for PowerPC context is part 
of the normal thread context since also interrupt handlers may use the floating 
point unit (GCC may use for example the multi-byte vector copy operations).

Are the soft-float and hard-float ABIs compatible on SPARC?  What happens if we 
call a hard-float Newlib function with floating-point arguments inside a 
soft-float RTEMS library?

-- 
Sebastian Huber, embedded brains GmbH

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