ARM (Thumb Mode) _CPU_Context_switch_arm

[Sebastian Huber]

On 02/22/2013 06:31 PM, Matthew J Fletcher wrote:
> Hi,
>
>  >Which code is at address 0x7fffe369 - 1?  The context will be initialized in
> the function >_Thread_Load_environment().
>
> I believe that's the issue, there is no code at that address, code starts at
> 0x81000000
>
> In _Thread_Start(), i can see that the_thread->Start.entry_point is set to
> 0x81007219, which is the Init() function.

This Start structure is irrelevant for the context switch.

>
> I can also see _Thread_Load_environment() set the stack and the entry point
> correctly, the _Thread_Heir->Registers contains the correct information into
> passed into _Context_Switch.
>
> But by the 'bx lr' line in _restore the sp and lr registers are showing the
> wrong values, well gdb says they are wrong anyway, the sp is now 0x40001c80
> which is not even ram, and the lr is before code space.

Are the values (sp and lr) of heir context correct on entry of the first 
_CPU_Context_switch()?

>
> Doing a single instruction step sets the pc to 0x7fffe368, so it looks like its
> branched to that address, the next instruction will fault as its just some rubbish.
>
> Is it possible this code is wrong for the arm7tdmi ? its not exactly cutting
> edge now, there are commends in the context switch code that it was tested on a
> arm7tdmi but with different instructions, was this code diffrent in the past ?

The context switch code is unchanged since 2002 and it works well.  I suppose 
something is wrong with the call to _CPU_Context_switch() or the heir context. 
  I can only help you with the latest RTEMS master branch since this is what I 
am using.

-- 
Sebastian Huber, embedded brains GmbH

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