SPARC Floating Point Support Changes

[Sebastian Huber]

Hello,

we work currently on an optimization for the SPARC floating point 
support.  See also:

https://devel.rtems.org/ticket/2270

We implement alternative (1). The floating point status register (FSR) 
is volatile according to the SPARC ABI.

https://lists.rtems.org/pipermail/devel/2015-May/011232.html

We are not sure if this is honoured in the RTEMS applications in 
general. Are there known uses cases which treat the FSR in a thread 
specific non-volatile way? It would be beneficial to rely on a volatile 
only usage since this would lead to a much simpler floating point 
context save/restore code.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
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E-Mail  : sebastian.huber at embedded-brains.de
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