RTEMS booting problem for PICO-PI-IMX7 board.

[JunBeom Kim (EmbedCoreTech)]

Dear Huber,

I found problem location.

< Assembly level >
//	movw r5, #0x0040
//	movt r5, #0x30A7
//	mov r6, #0x40
//	str r6, [r5]
This code transfer '@' data using UART5 TX register(0x30A70040).

< C Level >
#define mmio32_write(addr,val) *((volatile unsigned int *)(addr)) = (val)
mmio32_write(0x30A70040, 0x40); /* @ */

Problem location is in bsp_fdt_copy() of bsp-fdt.c.

void bsp_fdt_copy(const void *src)
{
  const uint32_t *s = (const uint32_t *) src;
#ifdef BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
  uint32_t *d = (uint32_t *) ((uintptr_t) &bsp_fdt_blob[0]
    - (uintptr_t) bsp_section_rodata_begin
    + (uintptr_t) bsp_section_rodata_load_begin);
#else
  uint32_t *d = RTEMS_DECONST(uint32_t *, &bsp_fdt_blob[0]);
#endif

  if (s != d) {
    size_t m = MIN(sizeof(bsp_fdt_blob), fdt_totalsize(src));
    size_t n = (m + sizeof(*d) - 1) / sizeof(*d);
    size_t i;

#if 1 // test code
	uint32_t temp;
	
    for (i = 0; i < n; ++i) {
      temp = s[i];
    }
    mmio32_write(0x30A70040, 0x40); /* @ */
    /* REMARK : Read Operation is OK */

    for (i = 0; i < n; ++i) {
       d[i] = temp;
    }
    /* REMARK : Write Operation is FAIL. Entering exception */

    mmio32_write(0x30A70040, 0x41); /* A */
#endif

    for (i = 0; i < n; ++i) {
      d[i] = s[i];
    }

    rtems_cache_flush_multiple_data_lines(d, m);
  }
}

I think that it is related with MMU configuration(Maybe, write protection) by U-Boot.

I am checking this.

Best Regards,
JunBeom


-----Original Message-----
From: JunBeom Kim (EmbedCoreTech) <jbkim at e-coretech.kr> 
Sent: Wednesday, April 11, 2018 12:34 AM
To: 'Sebastian Huber' <sebastian.huber at embedded-brains.de>; 'users at rtems.org' <users at rtems.org>
Subject: RE: RTEMS booting problem for PICO-PI-IMX7 board.

Dear Huber,

Please disregard my question about BSP_ARM_A9MPCORE_GT_BASE, BSP_ARM_A9MPCORE_SCU_BASE.

I checked this again.

Because i.MX7 port use arm-generic-timer-clock-confg.c instead of arm-a9mpcore-clock-config.c, these ZERO value will not effect any problem for i.MX7.

Best Regards,
JunBeom

-----Original Message-----
From: JunBeom Kim (EmbedCoreTech) <jbkim at e-coretech.kr> 
Sent: Wednesday, April 11, 2018 12:08 AM
To: 'Sebastian Huber' <sebastian.huber at embedded-brains.de>; 'users at rtems.org' <users at rtems.org>
Subject: RE: RTEMS booting problem for PICO-PI-IMX7 board.

Dear Huber,

I think so. DTB is modified by U-Boot. I don't know the reason right now. I am checking u-boot source.

But, Because clock-frequency variable of timer is disappeared in lastest Linux kernel, you need to review arm_generic_timer_get_config() in bspstart.c

I checked "dtc command on Linux" and "fdt command on u-boot"

< dtc command on Linux >
cpu at 0 {
	compatible = "arm,cortex-a7";
	device_type = "cpu";
	reg = <0x0>;
	clock-frequency = <0x3b5dc100>;
	clock-latency = <0xee6c>;
	clocks = <0x1 0x1b5>;
	operating-points = <0xf32a0 0x106738 0xc15c0 0xee098>;
	phandle = <0x3>;
};

< fdt command on u-boot >
cpu at 0 {
	compatible = "arm,cortex-a7";
	device_type = "cpu";
	reg = <0x00000000>;
	clock-frequency = ";]￢;
	clock-latency = <0x0000ee6c>;
	clocks = <0x00000001 0x000001b5>;
	operating-points = <0x000f32a0 0x00106738 0x000c15c0 0x000ee098>;
	phandle = <0x00000003>;
};

Also, I am checking bsp/arm/imx/include/bsp.h At this time, below definition is zero.

#define BSP_ARM_A9MPCORE_GT_BASE 0
#define BSP_ARM_A9MPCORE_SCU_BASE 0

Is there any reason which this definition is zero ?

Best Regards,
JunBeom

-----Original Message-----
From: Sebastian Huber <sebastian.huber at embedded-brains.de>
Sent: Tuesday, April 10, 2018 10:51 PM
To: JunBeom Kim (EmbedCoreTech) <jbkim at e-coretech.kr>; users at rtems.org
Subject: Re: RTEMS booting problem for PICO-PI-IMX7 board.

On 10/04/18 15:44, JunBeom Kim (EmbedCoreTech) wrote:
> At this time, I am checking Linux kernel's DTS building again.

The DTB is modified by U-Boot before it is handed over to the system to start. See the U-Boot sources for the details.

--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber at embedded-brains.de
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