zynq picozed board

[Chris Johns]

On 29/5/18 5:12 am, Siddons, David wrote:
> Has anyone implemented RTEMS on an Avnet Picozed board? What needs to be changed
> in the existing ZynQ support to do that?

There should not be too much. I have these functions with suitable values ....

/*
 * Provide the peripheral clock freq.
 */
uint32_t a9mpcore_clock_periphclk(void)
{
  return XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2;
}

uint32_t zynq_clock_cpu_1x(void)
{
  return 100000000U;
}

You may want to provide an MMU table that fits your needs so you can access the
AXI channels to the PL fabric:

#ifdef ARMV7_CP15_START_DEFAULT_SECTIONS

BSP_START_DATA_SECTION static const arm_cp15_start_section_config
zynq_mmu_config_table[] = {
  ARMV7_CP15_START_DEFAULT_SECTIONS,
  {
    .begin = 0xe0000000U,
    .end   = 0xe0200000U,
    .flags = ARMV7_MMU_DEVICE
  }
};

BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
{
  uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
    ARM_CP15_CTRL_A,
    ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
  );

  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
    ctrl,
    (uint32_t *) bsp_translation_table_base,
    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
    &zynq_mmu_config_table[0],
    RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
  );
}

#endif

These functions are weak in RTEMS so providing them in an object file in your
application overrides the RTEMS defaults for this BSP.

Chris