imx6ULL memcpy issue in RTEMS 5

Chris Johns chrisj at rtems.org
Tue Sep 4 10:24:09 UTC 2018


On 4/9/18 6:13 pm, Ian Caddy wrote:
> Hi All,
> 
> I am trying to get a imx6ULL custom BSP running on RTEMS 5.  I am working
> through some startup issues between u-boot and RTEMS and I think I have most of
> them squared away now.
> 
> During the RTEMS higher level init, the IMFS is inited and as part of that, /dev
> is created.  When creating the node for the "dev" directory, in:
> 
> rtems/cpukit/libfs/src/imfs/imfs_creat.c:56
> 
> it performs a memcpy to place the name into the node->name:
> 
> memcpy(RTEMS_DECONST(char *, node->name), name, namelen);
> 
> where:
> 
> node->name = 0x8031c4B8
> 
> name = "dev" @ 0x8029aff1
> 
> namelen = 3
> 
> At the lowest level memcpy calls:
> 
> gcc-7.3.0/newlib/libc/machine/arm/memcpy-armv7a.S
> 
> which at line 236 performs a half word load from the source (which is not
> aligned, not the name address above):
> 
>  ldrhcs tmp1, [src], #2
> 
> and I get a data abort as src = 0x8029aff1 which is a const string and has no
> reason to be word (or half word) aligned.
> 
> I pretty much copied the build tree, from the imx BSP (which is based on an imx7
> I think from memory) as the imx6ULL is a Cortex-A7 single core proceessor, using
> the ARMv7-A architecture.
> 
> Some places have been saying that I need to check whether or not the particular
> processor support non-aligned access, but the imx documentation is not that
> great and points to the ARM documentation which is more generalised.

I assume your set up is happening here ...

https://git.rtems.org/rtems/tree/bsps/arm/imx/start/bspstarthooks.c#n32

The arm_cp15_start_setup_mmu_and_cache call returns the CPSR on entry and that
is passed to the arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache
call.

If your BSP set up code does not set the A bit in the CPSR it will not be set
when RTEMS runs and newlib needs the A bit set in the CPSR.

Chris



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