change log for rtems (2010-12-22)
rtems-vc at rtems.org
rtems-vc at rtems.org
Wed Dec 22 15:11:17 UTC 2010
*sh*:
2010-12-22 Sebastian Huber <sebastian.huber at embedded-brains.de>
* new-exceptions/bspsupport/ppc_exc.S: Comment.
* new-exceptions/bspsupport/ppc_exc_address.c: Fixed address
calculation for e200z1 core.
M 1.361 c/src/lib/libcpu/powerpc/ChangeLog
M 1.7 c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
M 1.3 c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
diff -u rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.360 rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.361
--- rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.360 Tue Nov 30 11:13:28 2010
+++ rtems/c/src/lib/libcpu/powerpc/ChangeLog Wed Dec 22 08:13:03 2010
@@ -1,3 +1,9 @@
+2010-12-22 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * new-exceptions/bspsupport/ppc_exc.S: Comment.
+ * new-exceptions/bspsupport/ppc_exc_address.c: Fixed address
+ calculation for e200z1 core.
+
2010-11-30 Joel Sherrill <joel.sherrilL at OARcorp.com>
* mpc55xx/edma/edma.c: Use rtems_chain_first() and do not directly
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.6 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.7
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S:1.6 Mon Jun 28 19:39:39 2010
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S Wed Dec 22 08:13:03 2010
@@ -74,6 +74,12 @@
/**
* @brief Use vector offsets with 16 byte boundaries.
*
+ * This prologue is intended for cores with IVPR/IVOR registers. The e200z1
+ * core has hard wired values for the IVOR, thus all values are calculated to
+ * match its constraints. The link register will point to the next prologue.
+ * This is all right for the vector number calculation due the IVOR offset
+ * values.
+ *
* @see ppc_exc_min_prolog_auto();
*/
.global ppc_exc_min_prolog_auto_packed
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.2 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.3
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.2 Wed Apr 7 01:45:59 2010
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c Wed Dec 22 08:13:03 2010
@@ -70,7 +70,7 @@
* XXX: this directly matches the vector offsets in a e200z1,
* which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...)
*/
- vector_offset >>= 4;
+ vector_offset = (vector - 1) << 4;
}
if (bsp_exceptions_in_RAM) {
*sh*:
2010-12-22 Sebastian Huber <sebastian.huber at embedded-brains.de>
* configure.ac: Added I2C options. Fixed eMIOS prescaler. Use
standard linker command file support.
* include/bsp.h: Declare I2C initialization function.
* i2c/i2c_init.c: Implementation.
* make/custom/gwlcfm.cfg, make/custom/mpc5566evb.cfg,
make/custom/mpc55xx.inc: Use standard linker command file support.
* startup/bspstart.c: More board specific settings.
* Makefile.am, preinstall.am: Reflect changes above.
M 1.57 c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
M 1.23 c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
M 1.14 c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
M 1.2 c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c
M 1.6 c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h
M 1.3 c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg
M 1.3 c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg
M 1.2 c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc
M 1.9 c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
M 1.15 c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.56 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.57
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.56 Mon Aug 23 02:38:50 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog Wed Dec 22 08:21:03 2010
@@ -1,3 +1,14 @@
+2010-12-22 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * configure.ac: Added I2C options. Fixed eMIOS prescaler. Use
+ standard linker command file support.
+ * include/bsp.h: Declare I2C initialization function.
+ * i2c/i2c_init.c: Implementation.
+ * make/custom/gwlcfm.cfg, make/custom/mpc5566evb.cfg,
+ make/custom/mpc55xx.inc: Use standard linker command file support.
+ * startup/bspstart.c: More board specific settings.
+ * Makefile.am, preinstall.am: Reflect changes above.
+
2010-08-23 Sebastian Huber <sebastian.huber at embedded-brains.de>
* test/tests.c: Removed file.
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.22 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.23
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.22 Mon Aug 23 02:38:50 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am Wed Dec 22 08:21:03 2010
@@ -23,6 +23,7 @@
project_lib_DATA += rtems_crti.$(OBJEXT)
# Link commands
+project_lib_DATA += startup/linkcmds
dist_project_lib_DATA += startup/linkcmds.gwlcfm startup/linkcmds.mpc5566evb \
startup/linkcmds.base
@@ -37,6 +38,7 @@
../../shared/include/coverhd.h
include_bsp_HEADERS = include/mpc55xxevb.h \
include/smsc9218i.h \
+ ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h \
../../shared/include/utility.h \
@@ -60,8 +62,9 @@
# Misc
libbsp_a_SOURCES += startup/sd-card-init.c
-# bsp_i2c
-libbsp_a_SOURCES += i2c/i2c_init.c
+# I2C
+libbsp_a_SOURCES += i2c/i2c_init.c \
+ ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
# Network
if HAS_NETWORKING
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.13 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.14
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.13 Tue Jun 29 13:52:56 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac Wed Dec 22 08:21:03 2010
@@ -83,7 +83,7 @@
[Must be defined to be the PLL multiplication factor for clock generation])
RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[gwlcfm],[66])
-RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[*] ,[0])
+RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[*] ,[1])
RTEMS_BSPOPTS_HELP([MPC55XX_EMIOS_PRESCALER],
[Must be defined to set the EMIOS prescaler])
@@ -97,10 +97,16 @@
RTEMS_BSPOPTS_HELP([BOARD_GWLCFM],
[If defined, use custom settings of for the GW_LCFM board])
+RTEMS_BSPOPTS_SET([RTEMS_BSP_I2C_EEPROM_DEVICE_NAME],[gwlcfm],['"eeprom"'])
+RTEMS_BSPOPTS_HELP([RTEMS_BSP_I2C_EEPROM_DEVICE_NAME],[EEPROM name for LibI2C])
+RTEMS_BSPOPTS_SET([RTEMS_BSP_I2C_EEPROM_DEVICE_PATH],[gwlcfm],['"/dev/i2c1.eeprom"'])
+RTEMS_BSPOPTS_HELP([RTEMS_BSP_I2C_EEPROM_DEVICE_PATH],[EEPROM device file path])
+
AC_CONFIG_FILES([Makefile
include/bspopts.h])
RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+RTEMS_BSP_LINKCMDS
RTEMS_PPC_EXCEPTIONS
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c:1.1 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c:1.2
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c:1.1 Thu Mar 25 15:26:00 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/i2c/i2c_init.c Wed Dec 22 08:21:03 2010
@@ -16,97 +16,55 @@
+-----------------------------------------------------------------+
| this file contains the low level MPC5516 I2C driver parameters |
\*===============================================================*/
-#if 0 /* FIXME: make this work... */
-#include <mpc55xx/mpc55xx_i2cdrv.h>
+
#include <libchip/i2c-2b-eeprom.h>
-#include <bsp/irq.h>
+
#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/mpc83xx_i2cdrv.h>
-static mpc55xx_i2c_desc_t mpc55xx_i2c_bus_tbl[] = {
- /* first channel */
- {
- {/* public fields */
- .ops = &mpc55xx_i2c_ops,
- .size = sizeof(mpc55xx_i2c_bus_tbl[0]),
+#ifdef MPC55XX_IRQ_I2C
+ static mpc83xx_i2c_desc_t mpc55xx_i2c_bus = {
+ .bus_desc = {
+ .ops = &mpc83xx_i2c_ops,
+ .size = sizeof(mpc55xx_i2c_bus),
},
- { /* our private fields */
- .reg_ptr = &mpc55xx.i2c[0],
+ .softc = {
+ .reg_ptr = (m83xxI2CRegisters_t *) 0xfff88000,
.initialized = FALSE,
- .irq_number = BSP_IPIC_IRQ_I2C1,
- .base_frq = 0 /* will be set during initiailization */
+ .irq_number = MPC55XX_IRQ_I2C,
+ .base_frq = 0
}
- }
-};
-
-rtems_libi2c_bus_t *mpc55xx_i2c_bus_descriptor[] = {
- &mpc55xx_i2c_bus_tbl[0].bus_desc
-};
-
-/*=========================================================================*\
-| Function: |
-\*-------------------------------------------------------------------------*/
-rtems_status_code bsp_register_i2c
-(
-/*-------------------------------------------------------------------------*\
-| Purpose: |
-| register I2C busses and devices |
-+---------------------------------------------------------------------------+
-| Input Parameters: |
-\*-------------------------------------------------------------------------*/
- void /* <none> */
-)
-/*-------------------------------------------------------------------------*\
-| Return Value: |
-| 0 or error code |
-\*=========================================================================*/
-
-{
- int ret_code;
- int i2c1_busno,i2c2_busno;
+ };
- /*
- * init I2C library (if not already done)
- */
- rtems_libi2c_initialize ();
+ rtems_status_code bsp_register_i2c(void)
+ {
+ int rv = 0;
+ int busno = 0;
+
+ rtems_libi2c_initialize ();
+
+ mpc55xx_i2c_bus.softc.base_frq = bsp_clock_speed;
+ busno = rtems_libi2c_register_bus(
+ "/dev/i2c1",
+ &mpc55xx_i2c_bus.bus_desc
+ );
+ if (busno < 0) {
+ return RTEMS_IO_ERROR;
+ }
- /*
- * FIXME: update input frequency of I2c modules into descriptor
- */
-#if 0
- /*
- * I2C1 is clocked with TSEC 1
- */
- if (((mpc55xx.clk.sccr >> (31-1)) & 0x03) > 0) {
- mpc55xx_i2c_bus_tbl[0].softc.base_frq =
- (BSP_bus_frequency
- /((mpc55xx.clk.sccr >> (31-1)) & 0x03));
+ #ifdef RTEMS_BSP_I2C_EEPROM_DEVICE_NAME
+ rv = rtems_libi2c_register_drv(
+ RTEMS_BSP_I2C_EEPROM_DEVICE_NAME,
+ i2c_2b_eeprom_driver_descriptor,
+ busno,
+ 0x51
+ );
+ if (rv < 0) {
+ return RTEMS_IO_ERROR;
+ }
+ #endif
+
+ return RTEMS_SUCCESSFUL;
}
#endif
- mpc55xx_i2c_bus_tbl[1].softc.base_frq = BSP_bus_frequency;
- /*
- * register first I2C bus
- */
- ret_code = rtems_libi2c_register_bus("/dev/i2c1",
- mpc55xx_i2c_bus_descriptor[0]);
- if (ret_code < 0) {
- return -ret_code;
- }
- i2c1_busno = ret_code;
-
-#ifdef RTEMS_BSP_I2C_EEPROM_DEVICE_NAME
-
- /*
- * register EEPROM to bus 1, Address 0x50
- */
- ret_code = rtems_libi2c_register_drv(RTEMS_BSP_I2C_EEPROM_DEVICE_NAME,
- i2c_2b_eeprom_driver_descriptor,
- i2c1_busno,0x50);
-
- if (ret_code < 0) {
- return -ret_code;
- }
-
-#endif /* RTEMS_BSP_I2C_EEPROM_DEVICE_NAME */
- return 0;
-}
-#endif /* 0 */
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.5 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.6
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h:1.5 Mon May 10 14:16:07 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h Wed Dec 22 08:21:03 2010
@@ -18,8 +18,8 @@
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
-#ifndef LIBBSP_POWERPC_BSP_H
-#define LIBBSP_POWERPC_BSP_H
+#ifndef LIBBSP_POWERPC_MPC55XXEVB_BSP_H
+#define LIBBSP_POWERPC_MPC55XXEVB_BSP_H
#include <stdint.h>
@@ -64,10 +64,12 @@
#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
+rtems_status_code bsp_register_i2c(void);
+
#endif /* ASM */
#ifdef __cplusplus
}
#endif /* __cplusplus */
-#endif /* LIBBSP_POWERPC_BSP_H */
+#endif /* LIBBSP_POWERPC_MPC55XXEVB_BSP_H */
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg:1.2 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg:1.3
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg:1.2 Wed Apr 7 01:44:41 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg Wed Dec 22 08:21:03 2010
@@ -7,6 +7,4 @@
# @brief configuration file for the GWLCFM MPC5516 board
#
-RTEMS_LINKCMDS=linkcmds.gwlcfm
-
include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg:1.2 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg:1.3
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg:1.2 Wed Apr 7 01:44:41 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg Wed Dec 22 08:21:03 2010
@@ -7,6 +7,4 @@
# @brief Configuration file for MPC5566 evaluation board.
#
-RTEMS_LINKCMDS=linkcmds.mpc5566evb
-
include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc:1.1 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc:1.2
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc:1.1 Wed Apr 7 01:44:41 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc Wed Dec 22 08:21:03 2010
@@ -18,5 +18,3 @@
-D__ppc_generic -mstrict-align
CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
-
-LDFLAGS += -qnolinkcmds -T $(RTEMS_LINKCMDS)
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.8 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.9
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.8 Fri Apr 30 06:59:05 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am Wed Dec 22 08:21:03 2010
@@ -49,6 +49,10 @@
$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
$(PROJECT_LIB)/linkcmds.gwlcfm: startup/linkcmds.gwlcfm $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gwlcfm
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gwlcfm
@@ -89,6 +93,10 @@
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/smsc9218i.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/smsc9218i.h
+$(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h: ../../../libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mpc83xx_i2cdrv.h
+
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.14 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.15
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.14 Mon Aug 23 02:38:50 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c Wed Dec 22 08:21:03 2010
@@ -192,12 +192,14 @@
/* PD[ 8 ] I2C_SCL in/out */
{ 57, 1,{.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}},
/* PD[ 9 ] I2C_SDA in/out */
- { 58, 4,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10..13] LS_CAN_EN/LED out*/
+
+ { 58, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10] LS_CAN_EN out*/
+ { 59, 3,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}},
+ /* PD[11..13] PWO1_OC, MOCO_INT in */
+
{ 62, 4,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[14..15] USB_FLGA/B in */
- { 64, 3,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 0.. 2] MLBCLK/SI/DI in */
- { 67, 2,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 3.. 4] MLBSO/DO out*/
- { 69, 1,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 5.. 5] MLBSLOT in */
+ { 64, 5,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 0.. 4] LED_EXT1-5. out*/
{ 70, 1,{.B.PA = 1,.B.SRC = 3,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT out*/
{ 80, 1,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR out*/
@@ -209,7 +211,8 @@
{ 96,16,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PG[ 0..15] AD16..31 in/out*/
- {112, 3,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 0.. 2] LED_EXT1-3. out*/
+ {113, 1,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 1.. 1] RES_MOSTComp out*/
+ {114, 1,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 2.. 2] CS3_MOSTComp out*/
{115, 1,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 3.. 3] CS2_ETH out*/
{116, 2,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 4.. 5] FR/HC_TERM out*/
{118, 1,{.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 6.. 6] LIN_Tx out*/
@@ -218,6 +221,19 @@
{0,0}
};
+#elif defined(BOARD_PHYCORE_MPC5554)
+
+static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
+ { 0, 4,{.B.PA = 1, .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS [0:3] */
+ { 4,24,{.B.PA = 1, .B.DSC = 1 }}, /* ADDR [8 : 31] */
+ { 28,32,{.B.PA = 1, .B.DSC = 1 }}, /* DATA [0 : 31] */
+ { 60, 4,{.B.PA = 1, .B.DSC = 1, }}, /* TSIZ[0:1], RD_!WR, BDIP */
+ { 64, 6,{.B.PA = 1, .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* RD_!WR, BDIP, !WE, !OE, !TS */
+ { 89, 4,{.B.PA = 1 }}, /* ESCI_A and ESCI_B */
+ {229, 4,{ .B.OBE= 1,.B.DSC = 1 }}, /* CLKOUT */
+
+ {0,0}
+};
#else /* MPC55xxEVB */
@@ -234,17 +250,307 @@
};
#endif /* BOARD_GWLCFM */
+/*
+ * Arrays for setting up the chip selects.
+ * You can define up to four, and those with the valid bit
+ * set will be loaded into the matching chip select.
+ */
+static const struct EBI_CS_tag cs_setup[] = {
+#if defined(BOARD_GWLCFM)
+ /* CS0: External SRAM (16 bit, 1 wait states, 512kB, no burst) */
+ {
+ {
+ .B.BA = 0x20000000>>15,
+ .B.PS = 1,
+ .B.AD_MUX = 1,
+ .B.WEBS = 1,
+ .B.TBDIP = 0,
+ .B.BI = 1,
+ .B.V = 1
+ },
+ {
+ .B.AM = 0x1fff0,
+ .B.SCY = 1,
+ .B.BSCY = 0
+ }
+ },
+ /* CS1: External USB controller (16 bit, 3 wait states, 32kB, no burst) */
+ {
+ {
+ .B.BA = 0x22000000>>15,
+ .B.PS = 1,
+ .B.AD_MUX = 1,
+ .B.WEBS = 0,
+ .B.TBDIP = 0,
+ .B.BI = 1,
+ .B.V = 1
+ },
+ {
+ .B.AM = 0x1ffff,
+ .B.SCY = 3,
+ .B.BSCY = 0
+ }
+ },
+ /* CS2: Ethernet (16 bit, 2 wait states, 32kB, no burst) */
+ {
+ {
+ .B.BA = 0x22800000>>15,
+ .B.PS = 1,
+ .B.AD_MUX = 1,
+ .B.WEBS = 1,
+ .B.TBDIP = 0,
+ .B.BI = 1,
+ .B.V = 1
+ },
+ {
+ .B.AM = 0x1ffff,
+ .B.SCY = 1,
+ .B.BSCY = 0
+ }
+ },
+ { /* CS3: MOST Companion. */
+ {
+ .B.BA = 0x23000000>>15,
+ .B.PS = 1,
+ .B.AD_MUX = 1,
+ .B.WEBS = 0,
+ .B.TBDIP = 0,
+ .B.BI = 1,
+ .B.V = 1
+ },
+
+ {
+ .B.AM = 0x1fff0,
+ .B.SCY = 4,
+ .B.BSCY = 0
+ }
+ }
+#elif defined(BOARD_PHYCORE_MPC5554)
+ /* CS0: External flash. */
+ {
+ { .R = 0x20000003 }, /* Base 0x2000000, Burst Inhibit, Valid */
+ { .R = 0xff000050 }
+ },
+ /* CS1: External synchronous burst mode SRAM. */
+ {
+ { .R = 0x21000051 }, /* Base 0x2100000, 4-word Burst Enabled, Valid */
+ { .R = 0xff000000 } /* No wait states. */
+ },
+ /* CS2: External LAN91C111 */
+ {
+ { .R = 0x22000003 }, /* Base 0x22000000, Burst inhibit, valid */
+ { .R = 0xff000010 }
+ },
+
+ /* CS3: External FPGA */
+ {
+ { .R = 0x23000003 }, /* Base 0x23000000, Burst inhibit, valid. */
+ { .R = 0xff000020 }
+ }
+#else /* default, MPC55xxEVB */
+ /* CS0: External SRAM (2 wait states, 512kB, 4 word burst) */
+ {
+ {
+ .B.BA = 0,
+ .B.PS = 1,
+ .B.BL = 1,
+ .B.WEBS = 0,
+ .B.TBDIP = 0,
+ .B.BI = 1, /* TODO: Enable burst */
+ .B.V = 1
+ },
+
+ {
+ .B.AM = 0x1fff0,
+ .B.SCY = 0,
+ .B.BSCY = 0
+ }
+ },
+ { { .R = 0 }, { .R = 0 } }, /* CS1: Unused. */
+ { { .R = 0 }, { .R = 0 } }, /* CS2: Unused. */
+ { /* CS3: ethernet? */
+ {
+ .B.BA = 0x7fff,
+ .B.PS = 1,
+ .B.BL = 0,
+ .B.WEBS = 0,
+ .B.TBDIP = 0,
+ .B.BI = 1,
+ .B.V = 1
+ },
+
+ {
+ .B.AM = 0x1ffff,
+ .B.SCY = 1,
+ .B.BSCY = 0
+ }
+ }
+#endif /* Chip select setup */
+};
+
+/*
+ * Arrays for setting up the MAS registers.
+ * You can set as many as you want,we determine the size using sizeof.
+ */
+static const struct MMU_tag mmu_setup[] = {
+#if defined(BOARD_GWLCFM)
+ {
+ /* External Ethernet Controller (3 wait states, 64kB) */
+
+ {
+ .B.TLBSEL = 1, /* MAS0 */
+ .B.ESEL = 5
+ },
+ {
+ .B.VALID = 1, /* MAS1 */
+ .B.IPROT = 1,
+ .B.TSIZ = 1
+ },
+ {
+ .B.EPN = 0x3fff8, /* MAS2 */
+ .B.I = 1,
+ .B.G = 1
+ },
+ {
+ .B.RPN = 0x3fff8, /* MAS3 */
+ .B.UW = 1,
+ .B.SW = 1,
+ .B.UR = 1,
+ .B.SR = 1
+ }
+ }
+
+#elif defined(BOARD_PHYCORE_MPC5554)
+
+ /* XXX I'm not using TLB1 entry 2 the same way as
+ * in the BAM.
+ */
+ /* Set up MMU TLB1 entry 2 for external ram. */
+ /* Effective Base address = 0x2100_0000 XXX NOT LIKE BAM */
+ /* Real Base address = 0x2100_0000 XXX NOT LIKE BAM */
+ /* Page Size 6 = 4MB XXX Not like BAM */
+ /* Not Guarded, Cache Enable, All Access (0, 3F) */
+ {
+ { .R = 0x10020000}, /* MAS0 */
+ { .R = 0xC0000600}, /* MAS1 */
+ { .R = 0x21000000}, /* MAS2 */
+ { .R = 0x2100003F} /* MAS3 */
+ },
+
+ /* Set up MMU TLB1 entry 5 for second half of SRAM (debug RAM) */
+ /* Effective Base address = 0x2140_0000 */
+ /* Real Base address = 0x2140_0000 */
+ /* Page Size 6 = 4MB */
+ /* Not Guarded, Cache Enable, All Access (0, 3F) */
+ {
+ { .R = 0x10050000 }, /* MAS0 */
+ { .R = 0xC0000600 }, /* MAS1 */
+ { .R = 0x21400000 }, /* MAS2 */
+ { .R = 0x2140003F } /* MAS3 */
+ },
+ /* Set up MMU TLB1 entry 6 for External LAN91C111 */
+ /* Effective Base address = 0x2200_0000 */
+ /* Real Base address = 0x2200_0000 */
+ /* Page Size 7 = 16MB */
+ /* Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
+ {
+ { .R = 0x10060000}, /* MAS0 */
+ { .R = 0xC0000700}, /* MAS1 */
+ { .R = 0x2200000E}, /* MAS2 */
+ { .R = 0x2200003F} /* MAS3 */
+ },
+
+ /* Set up MMU TLB1 entry 7 for External FPGA */
+ /* Effective Base address = 0x2300_0000 */
+ /* Real Base address = 0x2300_0000 */
+ /* Page Size 7 = 16MB */
+ /* Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
+ {
+ { .R = 0x10070000}, /* MAS0 */
+ { .R = 0xC0000700}, /* MAS1 */
+ { .R = 0x2300000E}, /* MAS2 */
+ { .R = 0x2300003F}, /* MAS3 */
+ },
+
+ /* Should also set up maps for the debug RAM and the
+ * external flash.
+ */
+#else /* default, MPC55xxEVB */
+ {
+ /* External Ethernet Controller (3 wait states, 64kB) */
+ {
+ .B.TLBSEL = 1, /* MAS0 */
+ .B.ESEL = 5
+ },
+ {
+ .B.VALID = 1, /* MAS1 */
+ .B.IPROT = 1,
+ .B.TSIZ = 1
+ },
+ {
+ .B.EPN = 0x3fff8, /* MAS2 */
+ .B.I = 1,
+ .B.G = 1
+ },
+ {
+ .B.RPN = 0x3fff8, /* MAS3 */
+ .B.UW = 1,
+ .B.SW = 1,
+ .B.UR = 1,
+ .B.SR = 1
+ }
+ }
+#endif /* MMU setup */
+};
+
+#ifdef MPC55XX_BOOTFLAGS
+/* mpc55xx_bootflag_0 is defined in start.S using PUBLIC_VAR(). I go through this
+ * indirection to avoid a linker issue - if I try to reference
+ * mpc55xx_bootflag_0 as an "extern uint32_t" I get a linker error.
+ * Maybe if I declare it as an "extern const uint32_t"? Anyway, this works.
+ */
+extern void *mpc55xx_bootflag_0(void);
+uint32_t *p_mpc55xx_bootflag_0 = (uint32_t *)mpc55xx_bootflag_0;
+#endif
+
static void mpc55xx_ebi_init(void)
{
- struct EBI_CS_tag cs = { .BR = MPC55XX_ZERO_FLAGS, .OR = MPC55XX_ZERO_FLAGS };
- struct MMU_tag mmu = MMU_DEFAULT;
+ int i;
+#if defined(BOARD_GWLCFM)
+ SIU.GPDO[122].B.PDO=1; /* make sure USB reset is kept high */
+ SIU.GPDO[121].B.PDO=1; /* make sure Ethernet reset is kept high */
+ SIU.GPDO[113].B.PDO=1; /* make sure MOST Companion reset is kept high */
+#endif /* defined(BOARD_GWLCFM) */
/*
* init I/O pins to proper state
*/
mpc55xx_siu_pcr_init(&SIU,
siu_pcr_list);
+ /* Set up chip selects. */
+ for (i = 0; i < sizeof(cs_setup) / sizeof(cs_setup[0]); i++) {
+ if (cs_setup[i].BR.B.V) {
+ EBI.CS [i] = cs_setup[i];
+ }
+ }
+
+#ifdef MPC55XX_BOOTFLAGS
+ /* If the low bit of bootflag 0 is clear don't change the MMU.
+ */
+ if (((*p_mpc55xx_bootflag_0) & 1))
+#endif
+ {
+ /* Set up MMU. */
+ for (i = 0; i < sizeof(mmu_setup) / sizeof(mmu_setup[0]); i++) {
+ PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu_setup[i].MAS0.R);
+ PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu_setup[i].MAS1.R);
+ PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu_setup[i].MAS2.R);
+ PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu_setup[i].MAS3.R);
+ asm volatile ("tlbwe");
+ }
+ }
+
#if defined(BOARD_GWLCFM)
/*
* init EBI for Muxed AD bus
@@ -255,111 +561,6 @@
SIU.ECCR.B.EBDF = 3; /* use CLK/4 as bus clock */
- /* External SRAM (16 bit, 2 wait states, 512kB, no burst) */
-
- cs.BR.B.BA = 0;
- cs.BR.B.PS = 1;
- cs.BR.B.AD_MUX = 1;
- cs.BR.B.WEBS = 1;
- cs.BR.B.TBDIP = 0;
- cs.BR.B.BI = 1;
- cs.BR.B.V = 1;
-
- cs.OR.B.AM = 0x1fff0;
- cs.OR.B.SCY = 0;
- cs.OR.B.BSCY = 0;
-
- EBI.CS [0] = cs;
-
- /* External Ethernet Controller (3 wait states, 64kB) */
-
- mmu.MAS0.B.ESEL = 5;
- mmu.MAS1.B.VALID = 1;
- mmu.MAS1.B.IPROT = 1;
- mmu.MAS1.B.TSIZ = 1;
- mmu.MAS2.B.EPN = 0x3fff8;
- mmu.MAS2.B.I = 1;
- mmu.MAS2.B.G = 1;
- mmu.MAS3.B.RPN = 0x3fff8;
- mmu.MAS3.B.UW = 1;
- mmu.MAS3.B.SW = 1;
- mmu.MAS3.B.UR = 1;
- mmu.MAS3.B.SR = 1;
-
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu.MAS0.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu.MAS1.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu.MAS2.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu.MAS3.R);
-
- asm volatile ("tlbwe");
-
- cs.BR.B.BA = 0x7fff;
- cs.BR.B.PS = 1;
- cs.BR.B.BL = 0;
- cs.BR.B.AD_MUX = 1;
- cs.BR.B.WEBS = 0;
- cs.BR.B.TBDIP = 0;
- cs.BR.B.BI = 1;
- cs.BR.B.V = 1;
-
- cs.OR.B.AM = 0x1ffff;
- cs.OR.B.SCY = 1;
- cs.OR.B.BSCY = 0;
-
- EBI.CS [3] = cs;
-#else /* defined(BOARD_GWLCFM) */
-
- /* External SRAM (2 wait states, 512kB, 4 word burst) */
-
- cs.BR.B.BA = 0;
- cs.BR.B.PS = 1;
- cs.BR.B.BL = 1;
- cs.BR.B.WEBS = 0;
- cs.BR.B.TBDIP = 0;
- cs.BR.B.BI = 1; /* TODO: Enable burst */
- cs.BR.B.V = 1;
-
- cs.OR.B.AM = 0x1fff0;
- cs.OR.B.SCY = 0;
- cs.OR.B.BSCY = 0;
-
- EBI.CS [0] = cs;
-
- /* External Ethernet Controller (3 wait states, 64kB) */
-
- mmu.MAS0.B.ESEL = 5;
- mmu.MAS1.B.VALID = 1;
- mmu.MAS1.B.IPROT = 1;
- mmu.MAS1.B.TSIZ = 1;
- mmu.MAS2.B.EPN = 0x3fff8;
- mmu.MAS2.B.I = 1;
- mmu.MAS2.B.G = 1;
- mmu.MAS3.B.RPN = 0x3fff8;
- mmu.MAS3.B.UW = 1;
- mmu.MAS3.B.SW = 1;
- mmu.MAS3.B.UR = 1;
- mmu.MAS3.B.SR = 1;
-
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu.MAS0.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu.MAS1.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu.MAS2.R);
- PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu.MAS3.R);
-
- asm volatile ("tlbwe");
-
- cs.BR.B.BA = 0x7fff;
- cs.BR.B.PS = 1;
- cs.BR.B.BL = 0;
- cs.BR.B.WEBS = 0;
- cs.BR.B.TBDIP = 0;
- cs.BR.B.BI = 1;
- cs.BR.B.V = 1;
-
- cs.OR.B.AM = 0x1ffff;
- cs.OR.B.SCY = 1;
- cs.OR.B.BSCY = 0;
-
- EBI.CS [3] = cs;
#endif /* defined(BOARD_GWLCFM) */
}
@@ -413,14 +614,14 @@
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
- /* Time reference value */
- bsp_clicks_per_usec = bsp_clock_speed / 1000000;
-
/*
* determine clock speed
*/
bsp_clock_speed = mpc55xx_get_system_clock();
+ /* Time reference value */
+ bsp_clicks_per_usec = bsp_clock_speed / 1000000;
+
/* Initialize exceptions */
RTEMS_DEBUG_PRINT( "Initialize exceptions ...\n");
sc = ppc_exc_initialize(
@@ -444,9 +645,7 @@
}
/* Initialize eMIOS */
- mpc55xx_emios_initialize( 1);
-
- mpc55xx_emios_set_global_prescaler(MPC55XX_EMIOS_PRESCALER);
+ mpc55xx_emios_initialize( MPC55XX_EMIOS_PRESCALER);
/*
* Enable instruction and data caches. Do not force writethrough mode.
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
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