change log for rtems (2010-12-29)
rtems-vc at rtems.org
rtems-vc at rtems.org
Wed Dec 29 11:10:29 UTC 2010
*sh*:
2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
* mpc55xx/include/mpc55xx.h, mpc55xx/misc/copy.S: Removed zero
functions.
M 1.364 c/src/lib/libcpu/powerpc/ChangeLog
M 1.3 c/src/lib/libcpu/powerpc/mpc55xx/include/mpc55xx.h
M 1.5 c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S
diff -u rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.363 rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.364
--- rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.363 Wed Dec 29 03:51:17 2010
+++ rtems/c/src/lib/libcpu/powerpc/ChangeLog Wed Dec 29 04:45:33 2010
@@ -13,6 +13,8 @@
e200 exception vector defines. Added e500 exception vector defines.
Unified IVOR calculation for e200 and e500 (e200z1 has hard wired
IVOR values).
+ * mpc55xx/include/mpc55xx.h, mpc55xx/misc/copy.S: Removed zero
+ functions.
2010-12-23 Sebastian Huber <sebastian.huber at embedded-brains.de>
diff -u rtems/c/src/lib/libcpu/powerpc/mpc55xx/include/mpc55xx.h:1.2 rtems/c/src/lib/libcpu/powerpc/mpc55xx/include/mpc55xx.h:1.3
--- rtems/c/src/lib/libcpu/powerpc/mpc55xx/include/mpc55xx.h:1.2 Sun Nov 29 23:07:53 2009
+++ rtems/c/src/lib/libcpu/powerpc/mpc55xx/include/mpc55xx.h Wed Dec 29 04:45:33 2010
@@ -46,12 +46,6 @@
/* Defined in copy.S */
int mpc55xx_copy_8( const void *src, void *dest, size_t n);
-/* Defined in copy.S */
-int mpc55xx_zero_8( void *dest, size_t n);
-
-/* Defined in copy.S */
-int mpc55xx_zero_32( void *dest, size_t n);
-
/* Defined in fmpll.S */
void mpc55xx_fmpll_reset_config();
diff -u rtems/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S:1.4 rtems/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S:1.5
--- rtems/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S:1.4 Wed Apr 7 09:19:55 2010
+++ rtems/c/src/lib/libcpu/powerpc/mpc55xx/misc/copy.S Wed Dec 29 04:45:33 2010
@@ -3,7 +3,7 @@
*
* @ingroup mpc55xx_asm
*
- * @brief Memory copy and zero functions.
+ * @brief Memory copy functions.
*/
/*
@@ -78,146 +78,3 @@
/* Return */
blr
#endif /*!((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))*/
-
-/**
- * @fn int mpc55xx_zero_4( void *dest, size_t n)
- *
- * @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
- *
- * The address @a dest has to be aligned on 4 byte boundaries. The size @a n
- * must be evenly divisible by 4. No SPE operations are used.
- */
-#if ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
-GLOBAL_FUNCTION mpc55xx_zero_32
-GLOBAL_FUNCTION mpc55xx_zero_8
-#endif /* ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
-GLOBAL_FUNCTION mpc55xx_zero_4
- /* Create zero */
- xor r0, r0, r0
-
- /* Loop counter for the first bytes up to 16 bytes */
- rlwinm. r9, r4, 29, 30, 31
- beq zero_more4
- mtctr r9
- xor r5,r5,r5
-
-zero_data4:
- stwx r0, r5, r3
- addi r5, r5, 4
- bdnz zero_data4
-
-zero_more4:
- /* More than 16 bytes? */
- srwi. r9, r4, 4
- beqlr
- mtctr r9
-
-zero_big_data4:
- stw r0, 0(r3)
- stw r0, 4(r3)
- stw r0, 8(r3)
- stw r0, 12(r3)
- addi r3, r3, 16
- bdnz zero_big_data4
- /* Return */
- blr
-#if !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
-/**
- * @fn int mpc55xx_zero_8( void *dest, size_t n)
- *
- * @brief Zero all @a n bytes starting at @a dest with 8 byte writes.
- *
- * The address @a dest has to be aligned on 8 byte boundaries. The size @a n
- * must be evenly divisible by 8. The SPE operations @b evxor and @b evstddx will be used.
- */
-GLOBAL_FUNCTION mpc55xx_zero_8
- /* Create zero */
- evxor r0, r0, r0
-
- /* Set offset */
- evxor r5, r5, r5
-
- /* Loop counter for the first bytes up to 32 bytes */
- rlwinm. r9, r4, 29, 30, 31
- beq zero_more
- mtctr r9
-
-zero_data:
- evstddx r0, r3, r5
- addi r5, r5, 8
- bdnz zero_data
-
-zero_more:
- /* More than 32 bytes? */
- srwi. r9, r4, 5
- beqlr
- mtctr r9
-
- /* Set offsets */
- addi r6, r5, 8
- addi r7, r5, 16
- addi r8, r5, 24
-
-zero_big_data:
- evstddx r0, r3, r5
- addi r5, r5, 32
- evstddx r0, r3, r6
- addi r6, r6, 32
- evstddx r0, r3, r7
- addi r7, r7, 32
- evstddx r0, r3, r8
- addi r8, r8, 32
- bdnz zero_big_data
- /* Return */
- blr
-
-/**
- * @fn int mpc55xx_zero_32( void *dest, size_t n)
- *
- * @brief Zero all @a n bytes starting at @a dest with 32 byte writes.
- *
- * The address @a dest has to be aligned on 32 byte boundaries. The size @a n
- * must be evenly divisible by 32. The function operates with the cache block zero
- * operation @b dcbz.
- *
- * @note The cache has to be enabled for the desired memory area.
- */
-GLOBAL_FUNCTION mpc55xx_zero_32
- /* Set offset */
- xor r5, r5, r5
-
- /* Loop counter for the first bytes up to 128 bytes */
- rlwinm. r9, r4, 27, 28, 31
- beq zero_more_lines
- mtctr r9
-
-zero_line:
- dcbz r3, r5
- addi r5, r5, 32
- bdnz zero_line
-
-zero_more_lines:
- /* More than 128 bytes? */
- srwi. r9, r4, 7
- beqlr
- mtctr r9
-
- /* Set offsets */
- addi r6, r5, 32
- addi r7, r5, 64
- addi r8, r5, 96
-
-zero_big_line:
- dcbz r3, r5
- addi r5, r5, 128
- dcbz r3, r6
- addi r6, r6, 128
- dcbz r3, r7
- addi r7, r7, 128
- dcbz r3, r8
- addi r8, r8, 128
- bdnz zero_big_line
-
- /* Return */
- blr
-#endif /* !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
*sh*:
2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
* new-exceptions/bspsupport/ppc_exc_address.c,
new-exceptions/bspsupport/ppc_exc_initialize.c: Fixed IVOR handling for
e200z0 and e200z1.
M 1.5 c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
M 1.6 c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.4 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.5
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c:1.4 Wed Dec 29 03:51:18 2010
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c Wed Dec 29 04:48:08 2010
@@ -57,10 +57,10 @@
[ASM_BOOKE_DTLBMISS_VECTOR] = 13,
[ASM_BOOKE_ITLBMISS_VECTOR] = 14,
[ASM_BOOKE_DEBUG_VECTOR] = 15,
- [ASM_E500_SPE_UNAVAILABLE_VECTOR] = 32,
- [ASM_E500_EMB_FP_DATA_VECTOR] = 33,
- [ASM_E500_EMB_FP_ROUND_VECTOR] = 34,
- [ASM_E500_PERFMON_VECTOR] = 35
+ [ASM_E500_SPE_UNAVAILABLE_VECTOR] = 16,
+ [ASM_E500_EMB_FP_DATA_VECTOR] = 17,
+ [ASM_E500_EMB_FP_ROUND_VECTOR] = 18,
+ [ASM_E500_PERFMON_VECTOR] = 19
};
void *ppc_exc_vector_address(unsigned vector)
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c:1.5 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c:1.6
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c:1.5 Wed Dec 29 03:51:18 2010
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c Wed Dec 29 04:48:08 2010
@@ -38,6 +38,14 @@
/* Interupt vector prefix register */
MTIVPR(ppc_exc_vector_base);
+ if (ppc_cpu_is(PPC_e200z0) || ppc_cpu_is(PPC_e200z1)) {
+ /*
+ * These cores have hard wired IVOR registers. An access will case a
+ * program exception.
+ */
+ return;
+ }
+
/* Interupt vector offset registers */
MTIVOR(0, ppc_exc_vector_address(ASM_BOOKE_CRIT_VECTOR));
MTIVOR(1, ppc_exc_vector_address(ASM_MACH_VECTOR));
*sh*:
2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
* shared/include/start.h, shared/src/bsp-start-zero.S: New files.
M 1.239 c/src/lib/libbsp/powerpc/ChangeLog
A 1.1 c/src/lib/libbsp/powerpc/shared/include/start.h
A 1.1 c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S
diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.238 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.239
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.238 Wed Aug 25 17:21:14 2010
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Wed Dec 29 04:52:03 2010
@@ -1,3 +1,7 @@
+2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * shared/include/start.h, shared/src/bsp-start-zero.S: New files.
+
2010-08-25 Till Straumann <strauman at slac.stanford.edu>
PR 1689/bsps
diff -u /dev/null rtems/c/src/lib/libbsp/powerpc/shared/include/start.h:1.1
--- /dev/null Wed Dec 29 05:10:28 2010
+++ rtems/c/src/lib/libbsp/powerpc/shared/include/start.h Wed Dec 29 04:52:03 2010
@@ -0,0 +1,86 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_start
+ *
+ * @brief System low level start.
+ */
+
+/*
+ * Copyright (c) 2010 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#ifndef LIBBSP_POWERPC_SHARED_START_H
+#define LIBBSP_POWERPC_SHARED_START_H
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup bsp_start System Start
+ *
+ * @ingroup bsp_kit
+ *
+ * @brief System low level start.
+ *
+ * @{
+ */
+
+#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text")))
+
+#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
+
+/**
+* @brief System start entry.
+*/
+void _start(void);
+
+/**
+ * Zeros @a byte_count bytes starting at @a begin.
+ *
+ * It wraps around in case of an address overflow. The stack will not be used.
+ * The code is position independent. It uses the data cache block zero
+ * instruction in case the data cache is enabled. There are no alignment
+ * constains for @a begin and @a byte_count.
+ *
+ * @see bsp_start_zero_begin, bsp_start_zero_end, and bsp_start_zero_size.
+ */
+void BSP_START_TEXT_SECTION bsp_start_zero(void *begin, size_t byte_count);
+
+/**
+ * @brief Symbol which equals the bsp_start_zero() code begin.
+ */
+extern char bsp_start_zero_begin [];
+
+/**
+ * @brief Symbol which equals the bsp_start_zero() code end.
+ */
+extern char bsp_start_zero_end [];
+
+/**
+ * @brief Symbol which equals the bsp_start_zero() code size.
+ */
+extern char bsp_start_zero_size [];
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_POWERPC_SHARED_START_H */
diff -u /dev/null rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S:1.1
--- /dev/null Wed Dec 29 05:10:28 2010
+++ rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S Wed Dec 29 04:52:03 2010
@@ -0,0 +1,102 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_start
+ *
+ * @brief bsp_start_zero() implementation.
+ */
+
+/*
+ * Copyright (c) 2010 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+#include <rtems/asm.h>
+#include <bspopts.h>
+
+ .globl bsp_start_zero
+ .globl bsp_start_zero_begin
+ .globl bsp_start_zero_end
+ .globl bsp_start_zero_size
+
+ .section ".bsp_start_text", "ax"
+ .type bsp_start_zero, @function
+bsp_start_zero:
+bsp_start_zero_begin:
+ li r0, 0
+ subi r11, r3, 1
+ clrrwi r11, r11, 5
+ addi r10, r11, 32
+ subf r11, r3, r10
+ cmplw cr7, r11, r4
+ add r9, r3, r4
+ ble- cr7, head_end_done
+ mr r10, r9
+head_end_done:
+ subf r11, r3, r10
+ addi r11, r11, 1
+ mtctr r11
+
+ /* Head loop */
+ b head_loop_update
+head_loop_begin:
+ stb r0, 0(r3)
+ addi r3, r3, 1
+head_loop_update:
+ bdnz+ head_loop_begin
+
+ subf r11, r3, r9
+ srwi r11, r11, 5
+ addi r11, r11, 1
+ mtctr r11
+
+ /* Main loop */
+ b main_loop_update
+main_loop_begin:
+#ifdef DATA_CACHE_ENABLE
+ dcbz r0, r3
+ dcbf r0, r3
+#else
+ stw r0, 0(r3)
+ stw r0, 4(r3)
+ stw r0, 8(r3)
+ stw r0, 12(r3)
+ stw r0, 16(r3)
+ stw r0, 20(r3)
+ stw r0, 24(r3)
+ stw r0, 28(r3)
+#endif
+ addi r3, r3, 32
+main_loop_update:
+ bdnz+ main_loop_begin
+
+ subf r9, r3, r9
+ addi r9, r9, 1
+ mtctr r9
+
+ /* Tail loop */
+ b tail_loop_update
+tail_loop_begin:
+ stb r0, 0(r3)
+ addi r3, r3, 1
+tail_loop_update:
+ bdnz+ tail_loop_begin
+
+ /* Return */
+ sync
+ isync
+ blr
+
+bsp_start_zero_end:
+ .set bsp_start_zero_size, bsp_start_zero_end - bsp_start_zero_begin
*sh*:
2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
* Makefile.am, preinstall.am, startup/start.S: Use standard zero
function.
* startup/linkcmds.base: Reserve enough space for the exception
minimum prologues. Changed start section name.
* startup/bspstart.c: Removed superfluous cache initialization.
* configure.ac: Fixed option default values.
M 1.59 c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog
M 1.24 c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
M 1.15 c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
M 1.10 c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
M 1.16 c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
M 1.3 c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.base
M 1.7 c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.58 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.59
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog:1.58 Wed Dec 29 03:43:06 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog Wed Dec 29 04:54:56 2010
@@ -1,7 +1,11 @@
2010-12-29 Sebastian Huber <sebastian.huber at embedded-brains.de>
+ * Makefile.am, preinstall.am, startup/start.S: Use standard zero
+ function.
* startup/linkcmds.base: Reserve enough space for the exception
- minimum prologues.
+ minimum prologues. Changed start section name.
+ * startup/bspstart.c: Removed superfluous cache initialization.
+ * configure.ac: Fixed option default values.
2010-12-22 Sebastian Huber <sebastian.huber at embedded-brains.de>
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.23 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.24
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am:1.23 Wed Dec 22 08:21:03 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am Wed Dec 29 04:54:56 2010
@@ -42,13 +42,15 @@
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h \
../../shared/include/utility.h \
+ ../shared/include/start.h \
../shared/include/tictac.h
# startup
libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \
../../shared/bootcard.c ../shared/src/tictac.c ../../shared/bspclean.c \
../shared/startup/bspidle.c startup/bspstart.c startup/bspgetworkarea.c \
- ../../shared/bsppretaskinghook.c
+ ../../shared/bsppretaskinghook.c \
+ ../shared/src/bsp-start-zero.S
# clock
libbsp_a_SOURCES += clock/clock-config.c
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.14 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.15
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac:1.14 Wed Dec 22 08:21:03 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac Wed Dec 29 04:54:56 2010
@@ -23,21 +23,21 @@
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
-RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[gwlcfm],[0])
+RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[gwlcfm],[])
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[mpc5566evb],[1])
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
[If defined, the data cache will be enabled after address translation
is turned on.])
-RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[gwlcfm],[0])
+RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[gwlcfm],[])
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[mpc5566evb],[1])
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
[If defined, the instruction cache will be enabled after address translation
is turned on.])
-RTEMS_BSPOPTS_SET([UARTS_USE_TERMIOS],[*],[0])
+RTEMS_BSPOPTS_SET([UARTS_USE_TERMIOS],[*],[])
RTEMS_BSPOPTS_HELP([UARTS_USE_TERMIOS],
[Define to 1 if you want termios support for every port.
Termios support is independent of the choice of UART I/O mode.])
@@ -49,7 +49,7 @@
device will be registered as /dev/console.])
RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[gwlcfm],[1])
-RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[*] ,[0])
+RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[*] ,[])
RTEMS_BSPOPTS_HELP([UARTS_IO_MODE],
[Define to 1 if you want interrupt-driven I/O for the SCI ports.])
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.9 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.10
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am:1.9 Wed Dec 22 08:21:03 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am Wed Dec 29 04:54:57 2010
@@ -109,6 +109,10 @@
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
+$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
+
$(PROJECT_INCLUDE)/bsp/tictac.h: ../shared/include/tictac.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tictac.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tictac.h
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.15 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.16
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c:1.15 Wed Dec 22 08:21:03 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c Wed Dec 29 04:54:57 2010
@@ -646,14 +646,4 @@
/* Initialize eMIOS */
mpc55xx_emios_initialize( MPC55XX_EMIOS_PRESCALER);
-
- /*
- * Enable instruction and data caches. Do not force writethrough mode.
- */
-#if INSTRUCTION_CACHE_ENABLE
- rtems_cache_enable_instruction();
-#endif
-#if DATA_CACHE_ENABLE
- rtems_cache_enable_data();
-#endif
}
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.base:1.2 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.base:1.3
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.base:1.2 Wed Dec 29 03:43:06 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.base Wed Dec 29 04:54:57 2010
@@ -19,7 +19,8 @@
/*
* BSP: System startup entry
*/
- KEEP (*(.entry))
+ KEEP (*(.bsp_start_text))
+ KEEP (*(.bsp_start_data))
/*
* BSP: Moved into .text from .init
@@ -98,7 +99,7 @@
/*
* BSP: Reserve space for exception handler
*/
- . = . + 0x230;
+ . = . + 0x130;
. = ALIGN (bsp_section_align);
} > REGION_VECTORS
diff -u rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S:1.6 rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S:1.7
--- rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S:1.6 Wed Apr 7 01:44:41 2010
+++ rtems/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S Wed Dec 29 04:54:57 2010
@@ -28,7 +28,7 @@
#include <mpc55xx/reg-defs.h>
#include <bspopts.h>
-.section ".entry", "ax"
+.section ".bsp_start_text", "ax"
PUBLIC_VAR (start)
.globl fmpll_syncr_vals
bam_rchw:
@@ -127,28 +127,10 @@
/* Addresses */
LA r3, bsp_ram_start
- LA r4, bsp_ram_end
-
- /* Assert: Proper alignment of destination start */
- andi. r6, r3, 0x3f
- bne twiddle
-
- /* Assert: Proper alignment of destination end */
- andi. r6, r4, 0x3f
- bne twiddle
-
- /* Data size = destination end - destination start */
- subf r4, r3, r4
-
- /* Save time */
- mftb r24
+ LA r4, bsp_ram_size
/* Zero */
- bl SYM (mpc55xx_zero_32)
-
- /* Save time and get time delta */
- mftb r25
- subf r24, r24, r25
+ bl SYM (bsp_start_zero)
/*
* Copy data
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
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