change log for rtems (2011-08-14)
rtems-vc at rtems.org
rtems-vc at rtems.org
Sun Aug 14 08:10:12 UTC 2011
*ccj*:
2011-08-14 Chris Johns <chrisj at rtems.org>
* rtems/score/cpu.h: Clear the vector table for simple vectored
interrupts.
* irq.c: Add support for using the IIC with the Altera HAL.
M 1.34 cpukit/score/cpu/nios2/ChangeLog
M 1.10 cpukit/score/cpu/nios2/irq.c
M 1.21 cpukit/score/cpu/nios2/rtems/score/cpu.h
diff -u rtems/cpukit/score/cpu/nios2/ChangeLog:1.33 rtems/cpukit/score/cpu/nios2/ChangeLog:1.34
--- rtems/cpukit/score/cpu/nios2/ChangeLog:1.33 Wed Aug 10 10:00:53 2011
+++ rtems/cpukit/score/cpu/nios2/ChangeLog Sun Aug 14 02:38:14 2011
@@ -1,3 +1,9 @@
+2011-08-14 Chris Johns <chrisj at rtems.org>
+
+ * rtems/score/cpu.h: Clear the vector table for simple vectored
+ interrupts.
+ * irq.c: Add support for using the IIC with the Altera HAL.
+
2011-08-10 Sebastian Huber <sebastian.huber at embedded-brains.de>
* rtems/score/cpu.h: Removed superfluous comments. Format. Include
diff -u rtems/cpukit/score/cpu/nios2/irq.c:1.9 rtems/cpukit/score/cpu/nios2/irq.c:1.10
--- rtems/cpukit/score/cpu/nios2/irq.c:1.9 Thu Apr 21 14:05:14 2011
+++ rtems/cpukit/score/cpu/nios2/irq.c Sun Aug 14 02:38:14 2011
@@ -34,7 +34,73 @@
register unsigned long *stack_ptr __asm__ ("sp");
+RTEMS_INLINE_ROUTINE void
+__Dipatch_interrupt_vector(uint32_t vector, proc_ptr pp)
+{
+ if ( _ISR_Vector_table[ vector] )
+ {
+ (*_ISR_Vector_table[ vector ])(vector, pp);
+ };
+}
+
+#if (RTEMS_NIOS_USE_ALT_HAL == TRUE)
+
+#include <bsp/alt/nios2.h>
+
+RTEMS_INLINE_ROUTINE void __IIC_Handler(void)
+{
+ uint32_t active;
+ uint32_t mask;
+ uint32_t vector;
+
+ /*
+ * Obtain from the interrupt controller a bit list of pending interrupts,
+ * and then process the highest priority interrupt. This process loops,
+ * loading the active interrupt list on each pass until alt_irq_pending()
+ * return zero.
+ *
+ * The maximum interrupt latency for the highest priority interrupt is
+ * reduced by finding out which interrupts are pending as late as possible.
+ * Consider the case where the high priority interupt is asserted during
+ * the interrupt entry sequence for a lower priority interrupt to see why
+ * this is the case.
+ */
+
+ NIOS2_READ_IPENDING (active);
+
+ while (active)
+ {
+ vector = 0;
+ mask = 1;
+
+ /*
+ * Test each bit in turn looking for an active interrupt. Once one is
+ * found, the interrupt handler asigned by a call to alt_irq_register() is
+ * called to clear the interrupt condition.
+ */
+
+ while (active)
+ {
+ if (active & mask)
+ {
+ __Dipatch_interrupt_vector(vector, NULL);
+ active &= ~mask;
+ }
+ mask <<= 1;
+ ++vector;
+ };
+
+ NIOS2_READ_IPENDING (active);
+ }
+
+}
+#endif
+
+#if (RTEMS_NIOS_USE_ALT_HAL == TRUE)
+void __ISR_Handler(void)
+#else
void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
+#endif
{
register uint32_t level;
@@ -52,11 +118,12 @@
_Thread_Dispatch_increment_disable_level();
- if ( _ISR_Vector_table[ vector] )
- {
- (*_ISR_Vector_table[ vector ])(vector, ifr);
- };
-
+#if (RTEMS_NIOS_USE_ALT_HAL == TRUE)
+ __IIC_Handler();
+#else
+ __Dipatch_interrupt_vector(vector, ifr);
+#endif
+
/* Make sure that interrupts are disabled again */
_CPU_ISR_Disable( level );
@@ -87,5 +154,3 @@
{
_CPU_Fatal_halt(0xECC0);
}
-
-
diff -u rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.20 rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.21
--- rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h:1.20 Wed Aug 10 10:00:53 2011
+++ rtems/cpukit/score/cpu/nios2/rtems/score/cpu.h Sun Aug 14 02:38:14 2011
@@ -182,7 +182,12 @@
uint32_t ipending;
} CPU_Exception_frame;
+#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
+#define _CPU_Initialize_vectors() \
+ memset(_ISR_Vector_table, 0, sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS)
+#else
#define _CPU_Initialize_vectors()
+#endif
#define _CPU_ISR_Disable( _isr_cookie ) \
do { \
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/vc/attachments/20110814/af762d69/attachment.html>
More information about the vc
mailing list