change log for rtems (2011-08-24)
rtems-vc at rtems.org
rtems-vc at rtems.org
Wed Aug 24 10:10:19 UTC 2011
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* rtems/powerpc/registers.h: Renamed defines XER in PPC_XER, LR in
PPC_LR, CTR in PPC_CTR, PVR in PPC_PVR, RPA in PPC_RPA, DAR in
PPC_DAR, DEC in PPC_DEC, and EAR in PPC_EAR.
M 1.167 cpukit/score/cpu/powerpc/ChangeLog
M 1.39 cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
diff -u rtems/cpukit/score/cpu/powerpc/ChangeLog:1.166 rtems/cpukit/score/cpu/powerpc/ChangeLog:1.167
--- rtems/cpukit/score/cpu/powerpc/ChangeLog:1.166 Thu Jul 21 09:49:47 2011
+++ rtems/cpukit/score/cpu/powerpc/ChangeLog Wed Aug 24 04:43:06 2011
@@ -1,3 +1,9 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * rtems/powerpc/registers.h: Renamed defines XER in PPC_XER, LR in
+ PPC_LR, CTR in PPC_CTR, PVR in PPC_PVR, RPA in PPC_RPA, DAR in
+ PPC_DAR, DEC in PPC_DEC, and EAR in PPC_EAR.
+
2011-07-21 Sebastian Huber <sebastian.huber at embedded-brains.de>
* rtems/score/cpu.h: Added SPE support to CPU context.
diff -u rtems/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h:1.38 rtems/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h:1.39
--- rtems/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h:1.38 Wed May 11 03:43:28 2011
+++ rtems/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h Wed Aug 24 04:43:06 2011
@@ -122,14 +122,14 @@
#define TBRL 268
#define TBWU 285 /* Time base Upper/Lower (Writing) */
#define TBWL 284
-#define XER 1
-#define LR 8
-#define CTR 9
+#define PPC_XER 1
+#define PPC_LR 8
+#define PPC_CTR 9
#define HID0 1008 /* Hardware Implementation 0 */
#define HID1 1009 /* Hardware Implementation 1 */
#define HID2 1011 /* Hardware Implementation 2 */
#define DABR 1013 /* Data Access Breakpoint */
-#define PVR 287 /* Processor Version */
+#define PPC_PVR 287 /* Processor Version */
#define IBAT0U 528 /* Instruction BAT #0 Upper/Lower */
#define IBAT0L 529
#define IBAT1U 530 /* Instruction BAT #1 Upper/Lower */
@@ -174,9 +174,9 @@
#define HASH2 979
#define IMISS 980
#define ICMP 981
-#define RPA 982
+#define PPC_RPA 982
#define SDR1 25 /* MMU hash base register */
-#define DAR 19 /* Data Address Register */
+#define PPC_DAR 19 /* Data Address Register */
#define DEAR_BOOKE 61
#define DEAR_405 981
#define SPR0 272 /* Supervisor Private Registers */
@@ -196,8 +196,8 @@
#define SRR0 26 /* Saved Registers (exception) */
#define SRR1 27
#define IABR 1010 /* Instruction Address Breakpoint */
-#define DEC 22 /* Decrementer */
-#define EAR 282 /* External Address Register */
+#define PPC_DEC 22 /* Decrementer */
+#define PPC_EAR 282 /* External Address Register */
#define MSSCR0 1014 /* Memory Subsystem Control Register */
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S,
new-exceptions/bspsupport/ppc_exc_global_handler.c,
shared/include/cpuIdent.c, shared/src/stack.c: Update due to API
changes.
M 1.390 c/src/lib/libcpu/powerpc/ChangeLog
M 1.26 c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
M 1.14 c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S
M 1.4 c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c
M 1.32 c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c
M 1.2 c/src/lib/libcpu/powerpc/shared/src/stack.c
diff -u rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.389 rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.390
--- rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.389 Thu Jul 21 10:03:31 2011
+++ rtems/c/src/lib/libcpu/powerpc/ChangeLog Wed Aug 24 04:45:20 2011
@@ -1,3 +1,10 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S,
+ new-exceptions/bspsupport/ppc_exc_global_handler.c,
+ shared/include/cpuIdent.c, shared/src/stack.c: Update due to API
+ changes.
+
2011-07-21 Sebastian Huber <sebastian.huber at embedded-brains.de>
PR 1799/bsps
diff -u rtems/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c:1.25 rtems/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c:1.26
--- rtems/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c:1.25 Fri Feb 11 03:46:53 2011
+++ rtems/c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c Wed Aug 24 04:45:20 2011
@@ -35,7 +35,6 @@
SPR_RW(BOOKE_TCR)
SPR_RW(BOOKE_TSR)
SPR_RW(BOOKE_DECAR)
-SPR_RW(DEC)
extern int BSP_connect_clock_handler (void);
diff -u rtems/c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S:1.13 rtems/c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S:1.14
--- rtems/c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S:1.13 Fri Jan 28 14:38:12 2011
+++ rtems/c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S Wed Aug 24 04:45:20 2011
@@ -64,7 +64,7 @@
/*
* Enable caches and 604-specific features if necessary.
*/
- mfspr r9,PVR
+ mfspr r9,PPC_PVR
rlwinm r9,r9,16,16,31
cmpi 0,r9,PPC_601
beq 4f /* not needed for 601 */
@@ -128,7 +128,7 @@
.type get_L2CR, @function
get_L2CR:
/* Make sure this is a > 750 chip */
- mfspr r3,PVR
+ mfspr r3,PPC_PVR
rlwinm r3,r3,16,16,31
cmplwi r3,PPC_750 /* it's a 750 */
beq 1f
@@ -179,7 +179,7 @@
*/
/* Make sure this is a > 750 chip */
- mfspr r0,PVR
+ mfspr r0,PPC_PVR
rlwinm r0,r0,16,16,31
cmplwi r0,PPC_750
beq thisIs750
@@ -349,7 +349,7 @@
.type get_L3CR, @function
get_L3CR:
/* Make sure this is a 7455 chip */
- mfspr r3,PVR
+ mfspr r3,PPC_PVR
rlwinm r3,r3,16,16,31
cmplwi r3,PPC_7455 /* it's a 7455 */
beq 1f
@@ -379,7 +379,7 @@
*/
/* Make sure this is a 7455 chip */
- mfspr r0,PVR
+ mfspr r0,PPC_PVR
rlwinm r0,r0,16,16,31
cmplwi r0,PPC_7455
beq thisIs7455
@@ -482,7 +482,7 @@
.type CPU_clear_bats_early, at function
CPU_clear_bats_early:
li r3,0
- mfspr r4,PVR
+ mfspr r4,PPC_PVR
rlwinm r4,r4,16,16,31 /* r4 = 1 for 601, 4 for 604 */
cmpwi r4, 1
sync
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c:1.3 rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c:1.4
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c:1.3 Thu Jul 21 10:03:31 2011
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c Wed Aug 24 04:45:20 2011
@@ -42,7 +42,7 @@
static uint32_t ppc_exc_get_DAR_dflt(void)
{
if (ppc_cpu_is_60x())
- return PPC_SPECIAL_PURPOSE_REGISTER(DAR);
+ return PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR);
else
switch (ppc_cpu_is_bookE()) {
default:
diff -u rtems/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c:1.31 rtems/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c:1.32
--- rtems/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c:1.31 Fri Jan 28 14:38:13 2011
+++ rtems/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c Wed Aug 24 04:45:20 2011
@@ -21,7 +21,7 @@
/*
* Generate inline code to read Processor Version Register
*/
-SPR_RO(PVR)
+SPR_RO(PPC_PVR)
ppc_cpu_id_t current_ppc_cpu = PPC_UNKNOWN;
ppc_cpu_revision_t current_ppc_revision = 0xff;
@@ -79,7 +79,7 @@
if ( PPC_UNKNOWN != current_ppc_cpu )
return current_ppc_cpu;
- pvr = (_read_PVR() >> 16);
+ pvr = (_read_PPC_PVR() >> 16);
/*
* apply tweaks to ignore version
*/
@@ -210,7 +210,7 @@
ppc_cpu_revision_t get_ppc_cpu_revision(void)
{
- ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_PVR() & 0xffff);
+ ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_PPC_PVR() & 0xffff);
current_ppc_revision = rev;
return rev;
}
diff -u rtems/c/src/lib/libcpu/powerpc/shared/src/stack.c:1.1 rtems/c/src/lib/libcpu/powerpc/shared/src/stack.c:1.2
--- rtems/c/src/lib/libcpu/powerpc/shared/src/stack.c:1.1 Thu Feb 20 16:07:22 2003
+++ rtems/c/src/lib/libcpu/powerpc/shared/src/stack.c Wed Aug 24 04:45:20 2011
@@ -2,7 +2,7 @@
#include <rtems/bspIo.h>
#include <libcpu/spr.h>
-SPR_RO(LR)
+SPR_RO(PPC_LR)
typedef struct FrameRec_ {
struct FrameRec_ *up;
@@ -17,7 +17,7 @@
register int i=0;
if (pc) stack[i++]=pc;
if (!p)
- p = (Frame)_read_LR();
+ p = (Frame)_read_PPC_LR();
stack[i++]=p;
p = r1;
if (!p) /* no macro for reading user regs */
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* shared/bootloader/exception.S, shared/bootloader/misc.c,
shared/bootloader/mm.c, shared/console/polled_io.c,
shared/startup/probeMemEnd.c: Update due to API changes.
M 1.267 c/src/lib/libbsp/powerpc/ChangeLog
M 1.7 c/src/lib/libbsp/powerpc/shared/bootloader/exception.S
M 1.14 c/src/lib/libbsp/powerpc/shared/bootloader/misc.c
M 1.9 c/src/lib/libbsp/powerpc/shared/bootloader/mm.c
M 1.19 c/src/lib/libbsp/powerpc/shared/console/polled_io.c
M 1.8 c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c
diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.266 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.267
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.266 Wed Jul 27 20:13:19 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Wed Aug 24 04:48:56 2011
@@ -1,3 +1,9 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * shared/bootloader/exception.S, shared/bootloader/misc.c,
+ shared/bootloader/mm.c, shared/console/polled_io.c,
+ shared/startup/probeMemEnd.c: Update due to API changes.
+
2011-07-27 Till Straumann <strauman at slac.stanford.edu>
* shared/start/start.S, shared/start/preload.S:
diff -u rtems/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S:1.6 rtems/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S:1.7
--- rtems/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S:1.6 Fri Jan 28 14:29:52 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/bootloader/exception.S Wed Aug 24 04:48:56 2011
@@ -151,7 +151,7 @@
#ifdef ASSUME_REF_SET
andi. r3,r1,8 # check for guarded memory
bne- 5f
- mtspr RPA,r1
+ mtspr PPC_RPA,r1
mfsrr1 r3
tlbli r0
#else
@@ -167,7 +167,7 @@
blt- 5f # Negative means guarded, zero R not set.
mfsrr1 r3 # get saved cr0 bits now to dual issue
ori r1,r1,0x100
- mtspr RPA,r1
+ mtspr PPC_RPA,r1
tlbli r0
/* Do not update PTE if R bit already set, this will save one cache line
writeback at a later time, and avoid even more bus traffic in
@@ -246,14 +246,14 @@
2: lwz r1,4(r2) # Found: load second word of PTE
mfspr r0,DMISS # get miss address during load delay
#ifdef ASSUME_REF_SET
- mtspr RPA,r1
+ mtspr PPC_RPA,r1
mfsrr1 r3
tlbld r0
#else
andi. r3,r1,0x100 # check R bit ahead to help folding
mfsrr1 r3 # get saved cr0 bits now to dual issue
ori r1,r1,0x100
- mtspr RPA,r1
+ mtspr PPC_RPA,r1
tlbld r0
/* Do not update PTE if R bit already set, this will save one cache line
writeback at a later time, and avoid even more bus traffic in
@@ -323,7 +323,7 @@
andi. r3,r1,0x80 # check C bit
beq- 5f # if (C==0) go to check protection
3: mfsrr1 r3 # get the saved cr0 bits
- mtspr RPA,r1 # set the pte
+ mtspr PPC_RPA,r1 # set the pte
tlbld r0 # load the dtlb
mtcrf 0x80,r3 # restore CR0
rfi # return to executing program
diff -u rtems/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c:1.13 rtems/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c:1.14
--- rtems/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c:1.13 Fri Jul 15 20:21:36 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/bootloader/misc.c Wed Aug 24 04:48:56 2011
@@ -26,8 +26,7 @@
#include <rtems/bspIo.h>
#include <bsp.h>
-SPR_RW(DEC)
-SPR_RO(PVR)
+SPR_RO(PPC_PVR)
struct inode;
struct wait_queue;
@@ -264,7 +263,7 @@
default_vga_cmd = 0;
#define vpd res->VitalProductData
- if (_read_PVR()>>16 != 1) {
+ if (_read_PPC_PVR()>>16 != 1) {
if ( res && vpd.ProcessorBusHz ) {
ticks_per_ms = vpd.ProcessorBusHz/
(vpd.TimeBaseDivisor ? vpd.TimeBaseDivisor : 4000);
diff -u rtems/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c:1.8 rtems/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c:1.9
--- rtems/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c:1.8 Fri Jul 15 20:29:05 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/bootloader/mm.c Wed Aug 24 04:48:56 2011
@@ -95,7 +95,7 @@
SPR_RW(SDR1);
SPR_RO(DSISR);
-SPR_RO(DAR);
+SPR_RO(PPC_DAR);
/* We need a few statically allocated free maps to bootstrap the
* memory managment */
@@ -140,7 +140,7 @@
vaddr = p->nip;
cause = p->msr;
} else { /* Valid for DSI and alignment exceptions */
- vaddr = _read_DAR();
+ vaddr = _read_PPC_DAR();
cause = _read_DSISR();
}
diff -u rtems/c/src/lib/libbsp/powerpc/shared/console/polled_io.c:1.18 rtems/c/src/lib/libbsp/powerpc/shared/console/polled_io.c:1.19
--- rtems/c/src/lib/libbsp/powerpc/shared/console/polled_io.c:1.18 Fri Feb 11 06:19:29 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/console/polled_io.c Wed Aug 24 04:48:56 2011
@@ -373,9 +373,6 @@
#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
#define KBD_MODE_RFU 0x80
-SPR_RW(DEC)
-SPR_RO(PVR)
-
#endif /* USE_KBD_SUPPORT */
/* Early messages after mm init but before console init are kept in log
diff -u rtems/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c:1.7 rtems/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c:1.8
--- rtems/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c:1.7 Fri Feb 11 06:19:29 2011
+++ rtems/c/src/lib/libbsp/powerpc/shared/startup/probeMemEnd.c Wed Aug 24 04:48:56 2011
@@ -110,7 +110,7 @@
SPR_RW(L2CR)
SPR_RW(L3CR)
-SPR_RO(PVR)
+SPR_RO(PPC_PVR)
SPR_RW(HID0)
@@ -127,8 +127,8 @@
#undef DSSALL
}
asm volatile("sync");
- switch ( _read_PVR()>>16 ) {
- default: printk(__FILE__" CPU_lockUnlockCaches(): unknown CPU (PVR = 0x%08x)\n",_read_PVR());
+ switch ( _read_PPC_PVR()>>16 ) {
+ default: printk(__FILE__" CPU_lockUnlockCaches(): unknown CPU (PVR = 0x%08x)\n",_read_PPC_PVR());
return -1;
case PPC_750: printk("CPU_lockUnlockCaches(): Can't lock L2 on a mpc750, sorry :-(\n");
return -2; /* cannot lock L2 :-( */
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* network/network.c: Update due to API changes.
M 1.106 c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
M 1.19 c/src/lib/libbsp/powerpc/gen83xx/network/network.c
diff -u rtems/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog:1.105 rtems/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog:1.106
--- rtems/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog:1.105 Sat Jun 18 02:29:47 2011
+++ rtems/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog Wed Aug 24 04:50:15 2011
@@ -1,3 +1,7 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * network/network.c: Update due to API changes.
+
2011-06-18 Ralf Corsépius <ralf.corsepius at rtems.org>
* Makefile.am: Remove references to non-existing files.
diff -u rtems/c/src/lib/libbsp/powerpc/gen83xx/network/network.c:1.18 rtems/c/src/lib/libbsp/powerpc/gen83xx/network/network.c:1.19
--- rtems/c/src/lib/libbsp/powerpc/gen83xx/network/network.c:1.18 Mon Jan 24 09:32:04 2011
+++ rtems/c/src/lib/libbsp/powerpc/gen83xx/network/network.c Wed Aug 24 04:50:15 2011
@@ -58,7 +58,7 @@
SPR_RO( SVR)
/* Processor Version Register */
-SPR_RO( PVR)
+SPR_RO( PPC_PVR)
/*=========================================================================*\
| Function: |
@@ -83,7 +83,7 @@
int unitNumber;
char *unitName;
uint32_t svr = _read_SVR();
- uint32_t pvr = _read_PVR();
+ uint32_t pvr = _read_PPC_PVR();
memset(&tsec_cfg, 0, sizeof(tsec_cfg));
config->drv_ctrl = &tsec_cfg;
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* console/polled_io.c: Update due to API changes.
M 1.97 c/src/lib/libbsp/powerpc/ep1a/ChangeLog
M 1.6 c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c
diff -u rtems/c/src/lib/libbsp/powerpc/ep1a/ChangeLog:1.96 rtems/c/src/lib/libbsp/powerpc/ep1a/ChangeLog:1.97
--- rtems/c/src/lib/libbsp/powerpc/ep1a/ChangeLog:1.96 Tue Aug 23 13:06:08 2011
+++ rtems/c/src/lib/libbsp/powerpc/ep1a/ChangeLog Wed Aug 24 04:51:30 2011
@@ -1,3 +1,7 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * console/polled_io.c: Update due to API changes.
+
2011-08-23 Jennifer Averett <Jennifer.Averett at OARcorp.com>
* Makefile.am, console/config.c: Resolved printk issues.
diff -u rtems/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c:1.5 rtems/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c:1.6
--- rtems/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c:1.5 Fri Feb 11 06:44:30 2011
+++ rtems/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c Wed Aug 24 04:51:30 2011
@@ -381,9 +381,6 @@
#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
#define KBD_MODE_RFU 0x80
-SPR_RW(DEC)
-SPR_RO(PVR)
-
#endif /* USE_KBD_SUPPORT */
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* startup/iss555.c: Update due to API changes.
M 1.69 c/src/lib/libbsp/powerpc/ss555/ChangeLog
M 1.6 c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
diff -u rtems/c/src/lib/libbsp/powerpc/ss555/ChangeLog:1.68 rtems/c/src/lib/libbsp/powerpc/ss555/ChangeLog:1.69
--- rtems/c/src/lib/libbsp/powerpc/ss555/ChangeLog:1.68 Wed Feb 2 09:00:19 2011
+++ rtems/c/src/lib/libbsp/powerpc/ss555/ChangeLog Wed Aug 24 04:52:13 2011
@@ -1,3 +1,7 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * startup/iss555.c: Update due to API changes.
+
2011-02-02 Ralf Corsépius <ralf.corsepius at rtems.org>
* configure.ac: Require autoconf-2.68, automake-1.11.1.
diff -u rtems/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c:1.5 rtems/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c:1.6
--- rtems/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c:1.5 Wed Apr 28 12:17:48 2010
+++ rtems/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c Wed Aug 24 04:52:13 2011
@@ -18,7 +18,7 @@
#include <bsp.h>
SPR_RW(ICTRL);
-SPR_RW(DEC);
+SPR_RW(PPC_DEC);
SPR_RW(TBWU);
SPR_RW(TBWL);
SPR_RO(IMMR);
@@ -76,7 +76,7 @@
usiu.tbscrk = 0;
usiu.tbk = USIU_UNLOCK_KEY;
- _write_DEC(0x7FFFFFFF);
+ _write_PPC_DEC(0x7FFFFFFF);
_write_TBWU(0x00000000 );
_write_TBWL(0x00000000 );
usiu.tbk = 0;
*sh*:
2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
* start/start.S: Update due to API changes.
M 1.158 c/src/lib/libbsp/powerpc/gen5200/ChangeLog
M 1.18 c/src/lib/libbsp/powerpc/gen5200/start/start.S
diff -u rtems/c/src/lib/libbsp/powerpc/gen5200/ChangeLog:1.157 rtems/c/src/lib/libbsp/powerpc/gen5200/ChangeLog:1.158
--- rtems/c/src/lib/libbsp/powerpc/gen5200/ChangeLog:1.157 Thu Jul 28 14:20:09 2011
+++ rtems/c/src/lib/libbsp/powerpc/gen5200/ChangeLog Wed Aug 24 04:53:14 2011
@@ -1,3 +1,7 @@
+2011-08-24 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * start/start.S: Update due to API changes.
+
2011-27-28 Till Straumann <strauman at slac.stanford.edu>
* start/start.S: fixed indentation. Tag TOS with a NULL
diff -u rtems/c/src/lib/libbsp/powerpc/gen5200/start/start.S:1.17 rtems/c/src/lib/libbsp/powerpc/gen5200/start/start.S:1.18
--- rtems/c/src/lib/libbsp/powerpc/gen5200/start/start.S:1.17 Thu Jul 28 14:20:09 2011
+++ rtems/c/src/lib/libbsp/powerpc/gen5200/start/start.S Wed Aug 24 04:53:14 2011
@@ -755,11 +755,11 @@
SPRG_init: /* initialize registers */
xor r30, r30, r30
- mtspr XER, r30
- mtspr CTR, r30
+ mtspr PPC_XER, r30
+ mtspr PPC_CTR, r30
mtspr DSISR, r30
- mtspr DAR, r30
- mtspr DEC, r30
+ mtspr PPC_DAR, r30
+ mtspr PPC_DEC, r30
mtspr SDR1, r30
mtspr SRR0, r30
mtspr SRR1, r30
@@ -773,7 +773,7 @@
mtspr SPRG5, r30
mtspr SPRG6, r30
mtspr SPRG7, r30
- mtspr EAR, r30
+ mtspr PPC_EAR, r30
mtspr TBWU, r30
mtspr TBWL, r30
mtspr IBAT0U, r30
@@ -814,7 +814,7 @@
mtspr HASH2, r30
mtspr IMISS, r30
mtspr ICMP, r30
- mtspr RPA, r30
+ mtspr PPC_RPA, r30
mtsr PPC_SR0, r30
mtsr PPC_SR1, r30
mtsr PPC_SR2, r30
--
Generated by Deluxe Loginfo [http://www.codewiz.org/projects/index.html#loginfo] 2.122 by Bernardo Innocenti <bernie at develer.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/vc/attachments/20110824/88c8a4cb/attachment.html>
More information about the vc
mailing list