change log for rtems (2011-06-07)
rtems-vc at rtems.org
rtems-vc at rtems.org
Tue Jun 7 13:10:32 UTC 2011
*sh*:
2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
* aclocal/bspopts.m4: Added macros for cache options
RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED,
RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED,
RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED, and
RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED.
M 1.549 c/src/ChangeLog
M 1.5 c/src/aclocal/bspopts.m4
diff -u rtems/c/src/ChangeLog:1.548 rtems/c/src/ChangeLog:1.549
--- rtems/c/src/ChangeLog:1.548 Wed Mar 16 15:07:11 2011
+++ rtems/c/src/ChangeLog Tue Jun 7 07:55:44 2011
@@ -1,3 +1,11 @@
+2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * aclocal/bspopts.m4: Added macros for cache options
+ RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED,
+ RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED,
+ RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED, and
+ RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED.
+
2011-03-16 Jennifer Averett <jennifer.averett at OARcorp.com>
PR 1729/cpukit
diff -u rtems/c/src/aclocal/bspopts.m4:1.4 rtems/c/src/aclocal/bspopts.m4:1.5
--- rtems/c/src/aclocal/bspopts.m4:1.4 Tue Feb 3 03:13:41 2009
+++ rtems/c/src/aclocal/bspopts.m4 Tue Jun 7 07:55:44 2011
@@ -64,3 +64,21 @@
[AS_HELP_STRING([$1],[$2], )])],
[$0($1)])dnl
])
+
+AC_DEFUN(
+[RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED],
+[RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[$1],[$2])])
+
+AC_DEFUN(
+[RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED],
+[RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],
+[enables the data cache, if defined to a value other than zero])])
+
+AC_DEFUN(
+[RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED],
+[RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[$1],[$2])])
+
+AC_DEFUN(
+[RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED],
+[RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],
+[enables the instruction cache, if defined to a value other than zero])])
*sh*:
2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
* new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of
PPC_USE_DATA_CACHE.
M 1.386 c/src/lib/libcpu/powerpc/ChangeLog
M 1.15 c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
diff -u rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.385 rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.386
--- rtems/c/src/lib/libcpu/powerpc/ChangeLog:1.385 Tue Jun 7 03:23:44 2011
+++ rtems/c/src/lib/libcpu/powerpc/ChangeLog Tue Jun 7 07:59:39 2011
@@ -1,5 +1,10 @@
2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
+ * new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of
+ PPC_USE_DATA_CACHE.
+
+2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
* shared/src/cache_.h: Moved implementation from "cache.c" to here.
This avoids the function call overhead.
* shared/src/cache.c: Removed file.
diff -u rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S:1.14 rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S:1.15
--- rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S:1.14 Tue Dec 1 19:41:57 2009
+++ rtems/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S Tue Jun 7 07:59:39 2011
@@ -293,21 +293,21 @@
sync
isync
/* This assumes that all the registers are in the given order */
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
#if PPC_CACHE_ALIGNMENT != 32
#error "code assumes PPC_CACHE_ALIGNMENT == 32!"
#endif
li r5, PPC_CACHE_ALIGNMENT
#endif
addi r9,r3,-4
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9
#endif
stw r1, GP_1+4(r9)
stw r2, GP_2+4(r9)
#if (PPC_USE_MULTIPLE == 1)
addi r9, r9, GP_18+4
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9
#endif
stmw r13, GP_13-GP_18(r9)
@@ -318,7 +318,7 @@
stw r16, GP_16+4(r9)
stw r17, GP_17+4(r9)
stwu r18, GP_18+4(r9)
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9
#endif
stw r19, GP_19-GP_18(r9)
@@ -335,7 +335,7 @@
stw r30, GP_30-GP_18(r9)
stw r31, GP_31-GP_18(r9)
#endif
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbt r0, r4
#endif
mfcr r6
@@ -350,19 +350,19 @@
EXTERN_PROC(_CPU_Context_switch_altivec)
bl _CPU_Context_switch_altivec
mr r4, r14
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
li r5, PPC_CACHE_ALIGNMENT
#endif
#endif
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4
#endif
lwz r1, GP_1(r4)
lwz r2, GP_2(r4)
#if (PPC_USE_MULTIPLE == 1)
addi r4, r4, GP_19
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4
#endif
lmw r13, GP_13-GP_19(r4)
@@ -374,7 +374,7 @@
lwz r17, GP_17(r4)
lwz r18, GP_18(r4)
lwzu r19, GP_19(r4)
-#if ( PPC_USE_DATA_CACHE )
+#if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4
#endif
lwz r20, GP_20-GP_19(r4)
*sh*:
2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
* shared/src/bsp-start-zero.S: Use BSP_DATA_CACHE_ENABLED instead of
DATA_CACHE_ENABLE.
M 1.248 c/src/lib/libbsp/powerpc/ChangeLog
M 1.2 c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S
diff -u rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.247 rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.248
--- rtems/c/src/lib/libbsp/powerpc/ChangeLog:1.247 Wed May 18 00:26:52 2011
+++ rtems/c/src/lib/libbsp/powerpc/ChangeLog Tue Jun 7 08:02:50 2011
@@ -1,3 +1,8 @@
+2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * shared/src/bsp-start-zero.S: Use BSP_DATA_CACHE_ENABLED instead of
+ DATA_CACHE_ENABLE.
+
2011-05-17 Till Straumann <strauman at slac.stanford.edu>
PR1797/bsps
diff -u rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S:1.1 rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S:1.2
--- rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S:1.1 Wed Dec 29 04:52:03 2010
+++ rtems/c/src/lib/libbsp/powerpc/shared/src/bsp-start-zero.S Tue Jun 7 08:02:50 2011
@@ -64,7 +64,7 @@
/* Main loop */
b main_loop_update
main_loop_begin:
-#ifdef DATA_CACHE_ENABLE
+#if BSP_DATA_CACHE_ENABLED
dcbz r0, r3
dcbf r0, r3
#else
*sh*:
2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
M 1.56 c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
M 1.12 c/src/lib/libbsp/powerpc/tqm8xx/configure.ac
M 1.11 c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
diff -u rtems/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog:1.55 rtems/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog:1.56
--- rtems/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog:1.55 Wed Feb 9 02:27:52 2011
+++ rtems/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog Tue Jun 7 08:05:07 2011
@@ -1,3 +1,7 @@
+2011-06-07 Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+ * configure.ac, startup/bspstart.c: Use standard cache BSP options.
+
2011-02-09 Ralf Corsépius <ralf.corsepius at rtems.org>
* timer/timer.c: Include <rtems/btimer.h>.
diff -u rtems/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac:1.11 rtems/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac:1.12
--- rtems/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac:1.11 Wed Feb 2 09:00:21 2011
+++ rtems/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac Tue Jun 7 08:05:07 2011
@@ -18,21 +18,11 @@
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
-RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])
-RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
-[If defined, then the PowerPC specific code in RTEMS will use
- data cache instructions to optimize the context switch code.
- This code can conflict with debuggers or emulators.])
-
-RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
-[If defined, the data cache will be enabled after address translation
- is turned on.])
-
-RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
-RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
-[If defined, the instruction cache will be enabled after address translation
- is turned on.])
+RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
+
+RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1])
+RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
RTEMS_BSPOPTS_SET([CONSOLE_CHN],[*],[CONS_CHN_SMC1])
RTEMS_BSPOPTS_HELP([CONSOLE_CHN],
diff -u rtems/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c:1.10 rtems/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c:1.11
--- rtems/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c:1.10 Sun Nov 29 22:30:48 2009
+++ rtems/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c Tue Jun 7 08:05:07 2011
@@ -147,11 +147,11 @@
* Enable instruction and data caches. Do not force writethrough mode.
*/
-#if INSTRUCTION_CACHE_ENABLE
+#if BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction();
#endif
-#if DATA_CACHE_ENABLE
+#if BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data();
#endif
--
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