change log for rtems (2011-05-19)

rtems-vc at rtems.org rtems-vc at rtems.org
Thu May 19 13:11:45 UTC 2011


 *sh*:
2011-05-19	Sebastian Huber <sebastian.huber at embedded-brains.de>

	* Makefile.am, preinstall.am: Install new header files.
	* include/bsp.h, include/emc.h, include/lpc32xx.h, misc/emc.c: Update
	for API changes.

M   1.30  c/src/lib/libbsp/arm/lpc32xx/ChangeLog
M   1.10  c/src/lib/libbsp/arm/lpc32xx/Makefile.am
M    1.9  c/src/lib/libbsp/arm/lpc32xx/include/bsp.h
M    1.3  c/src/lib/libbsp/arm/lpc32xx/include/emc.h
M   1.13  c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h
M    1.3  c/src/lib/libbsp/arm/lpc32xx/misc/emc.c
M    1.9  c/src/lib/libbsp/arm/lpc32xx/preinstall.am

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/ChangeLog:1.29 rtems/c/src/lib/libbsp/arm/lpc32xx/ChangeLog:1.30
--- rtems/c/src/lib/libbsp/arm/lpc32xx/ChangeLog:1.29	Mon Mar 28 04:00:00 2011
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/ChangeLog	Thu May 19 07:11:35 2011
@@ -1,3 +1,9 @@
+2011-05-19	Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+	* Makefile.am, preinstall.am: Install new header files.
+	* include/bsp.h, include/emc.h, include/lpc32xx.h, misc/emc.c: Update
+	for API changes.
+
 2011-03-29	Sebastian Huber <sebastian.huber at embedded-brains.de>
 
 	* configure.ac, include/bspopts.h.in: New BSP option

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/Makefile.am:1.9 rtems/c/src/lib/libbsp/arm/lpc32xx/Makefile.am:1.10
--- rtems/c/src/lib/libbsp/arm/lpc32xx/Makefile.am:1.9	Fri Dec  3 03:29:07 2010
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/Makefile.am	Thu May 19 07:11:35 2011
@@ -39,6 +39,8 @@
 include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
 include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
 include_bsp_HEADERS += ../shared/lpc/include/lpc-i2s.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-emc.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-lcd.h
 include_bsp_HEADERS += include/irq.h
 include_bsp_HEADERS += include/mmu.h
 include_bsp_HEADERS += include/lpc32xx.h

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h:1.8 rtems/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h:1.9
--- rtems/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h:1.8	Mon Mar 28 04:00:00 2011
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h	Thu May 19 07:11:36 2011
@@ -147,12 +147,12 @@
 #define LPC32XX_DO_STOP_GPDMA \
   do { \
     if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \
-      if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) { \
+      if ((lpc32xx.dma.cfg & DMA_CFG_E) != 0) { \
         int i = 0; \
         for (i = 0; i < 8; ++i) { \
           lpc32xx.dma.channels [i].cfg = 0; \
         } \
-        lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN; \
+        lpc32xx.dma.cfg &= ~DMA_CFG_E; \
       } \
       LPC32XX_DMACLK_CTRL = 0; \
     } \

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/include/emc.h:1.2 rtems/c/src/lib/libbsp/arm/lpc32xx/include/emc.h:1.3
--- rtems/c/src/lib/libbsp/arm/lpc32xx/include/emc.h:1.2	Thu Oct 14 04:37:18 2010
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/include/emc.h	Thu May 19 07:11:36 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -24,23 +25,20 @@
 
 #include <rtems.h>
 
-#include <bsp/lpc32xx.h>
+#include <bsp/lpc-emc.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif /* __cplusplus */
 
 /**
- * @defgroup lpc32xx_emc EMC Support
- *
- * @ingroup lpc32xx
+ * @addtogroup lpc_emc
  *
  * @brief EMC Support
  *
  * @{
  */
 
-
 /**
  * @name SDRAM Clock Control Register (SDRAMCLK_CTRL)
  *
@@ -64,74 +62,6 @@
 /** @} */
 
 /**
- * @name EMC Control Register (EMCControl)
- *
- * @{
- */
-
-#define EMC_CTRL_EN BSP_BIT32(0)
-#define EMC_CTRL_LOW_POWER BSP_BIT32(2)
-
-/** @} */
-
-/**
- * @name EMC Dynamic Memory Control Register (EMCDynamicControl)
- *
- * @{
- */
-
-#define EMC_DYN_CTRL_CE BSP_BIT32(0)
-#define EMC_DYN_CTRL_CS BSP_BIT32(1)
-#define EMC_DYN_CTRL_SR BSP_BIT32(2)
-#define EMC_DYN_CTRL_SRMCC BSP_BIT32(3)
-#define EMC_DYN_CTRL_IMCC BSP_BIT32(4)
-#define EMC_DYN_CTRL_MCC BSP_BIT32(5)
-#define EMC_DYN_CTRL_I_MASK BSP_MSK32(7, 8)
-#define EMC_DYN_CTRL_I_NORMAL BSP_FLD32(0x0, 7, 8)
-#define EMC_DYN_CTRL_I_MODE BSP_FLD32(0x1, 7, 8)
-#define EMC_DYN_CTRL_I_PALL BSP_FLD32(0x2, 7, 8)
-#define EMC_DYN_CTRL_I_NOP BSP_FLD32(0x3, 7, 8)
-#define EMC_DYN_CTRL_DP BSP_BIT32(9)
-
-/** @} */
-
-/**
- * @name EMC Dynamic Memory Read Configuration Register (EMCDynamicReadConfig)
- *
- * @{
- */
-
-#define EMC_DYN_READ_CONFIG_SDR_STRAT(val) BSP_FLD32(val, 0, 1)
-#define EMC_DYN_READ_CONFIG_SDR_POL_POS BSP_BIT32(4)
-#define EMC_DYN_READ_CONFIG_DDR_STRAT(val) BSP_FLD32(val, 8, 9)
-#define EMC_DYN_READ_CONFIG_DDR_POL_POS BSP_BIT32(12)
-
-/** @} */
-
-/**
- * @name EMC Dynamic Memory Configuration N Register (EMCDynamicConfigN)
- *
- * @{
- */
-
-#define EMC_DYN_CFG_MD(val) BSP_FLD32(val, 0, 2)
-#define EMC_DYN_CFG_AM(val) BSP_FLD32(val, 7, 14)
-#define EMC_DYN_CFG_P(val) BSP_BIT32(20)
-
-/** @} */
-
-/**
- * @name EMC Dynamic Memory RAS and CAS Delay N Register (EMCDynamicRasCasN)
- *
- * @{
- */
-
-#define EMC_DYN_RAS(val) BSP_FLD32(val, 0, 3)
-#define EMC_DYN_CAS(val) BSP_FLD32(val, 7, 10)
-
-/** @} */
-
-/**
  * @name EMC AHB Control Register (EMCAHBControl)
  *
  * @{

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h:1.12 rtems/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h:1.13
--- rtems/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h:1.12	Thu Dec 16 07:35:06 2010
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h	Thu May 19 07:11:36 2011
@@ -28,6 +28,7 @@
 #include <bsp/lpc-timer.h>
 #include <bsp/lpc-dma.h>
 #include <bsp/lpc-i2s.h>
+#include <bsp/lpc-emc.h>
 
 /**
  * @defgroup lpc32xx_reg Register Definitions
@@ -232,7 +233,8 @@
 
 /** @} */
 
-#define LPC32XX_RESERVED(a, b, s) (((b) - (a) - sizeof(s)) / 4)
+#define LPC32XX_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)]
+#define LPC32XX_RESERVE(a, b) uint8_t reserved_ ## b [b - a]
 
 typedef struct {
 } lpc32xx_nand_slc;
@@ -431,7 +433,10 @@
   uint32_t p2_inp_state;
   uint32_t p2_outp_set;
   uint32_t p2_outp_clr;
-  uint32_t reserved_0 [6];
+  uint32_t p2_mux_set;
+  uint32_t p2_mux_clr;
+  uint32_t p2_mux_state;
+  LPC32XX_RESERVE(0x034, 0x040);
   uint32_t p0_inp_state;
   uint32_t p0_outp_set;
   uint32_t p0_outp_clr;
@@ -439,7 +444,7 @@
   uint32_t p0_dir_set;
   uint32_t p0_dir_clr;
   uint32_t p0_dir_state;
-  uint32_t reserved_1 [1];
+  LPC32XX_RESERVE(0x05c, 0x060);
   uint32_t p1_inp_state;
   uint32_t p1_outp_set;
   uint32_t p1_outp_clr;
@@ -447,6 +452,16 @@
   uint32_t p1_dir_set;
   uint32_t p1_dir_clr;
   uint32_t p1_dir_state;
+  LPC32XX_RESERVE(0x07c, 0x110);
+  uint32_t p3_mux_set;
+  uint32_t p3_mux_clr;
+  uint32_t p3_mux_state;
+  uint32_t p0_mux_set;
+  uint32_t p0_mux_clr;
+  uint32_t p0_mux_state;
+  uint32_t p1_mux_set;
+  uint32_t p1_mux_clr;
+  uint32_t p1_mux_state;
 } lpc32xx_gpio;
 
 typedef struct {
@@ -475,27 +490,6 @@
   uint32_t sram [32];
 } lpc32xx_rtc;
 
-#define EMC_DYN_CHIP_COUNT 2
-
-#define EMC_STATIC_CHIP_COUNT 4
-
-typedef struct {
-  uint32_t config;
-  uint32_t rascas;
-  uint32_t reserved_0 [6];
-} lpc32xx_emc_dynamic;
-
-typedef struct {
-  uint32_t config;
-  uint32_t waitwen;
-  uint32_t waitoen;
-  uint32_t waitrd;
-  uint32_t waitpage;
-  uint32_t waitwr;
-  uint32_t waitturn;
-  uint32_t reserved_0 [1];
-} lpc32xx_emc_static;
-
 typedef struct {
   uint32_t control;
   uint32_t status;
@@ -504,36 +498,6 @@
 } lpc32xx_emc_ahb;
 
 typedef struct {
-  uint32_t control;
-  uint32_t status;
-  uint32_t config;
-  uint32_t reserved_0 [5];
-  uint32_t dynamiccontrol;
-  uint32_t dynamicrefresh;
-  uint32_t dynamicreadconfig;
-  uint32_t reserved_1;
-  uint32_t dynamictrp;
-  uint32_t dynamictras;
-  uint32_t dynamictsrex;
-  uint32_t reserved_2 [2];
-  uint32_t dynamictwr;
-  uint32_t dynamictrc;
-  uint32_t dynamictrfc;
-  uint32_t dynamictxsr;
-  uint32_t dynamictrrd;
-  uint32_t dynamictmrd;
-  uint32_t dynamictcdlr;
-  uint32_t reserved_3 [8];
-  uint32_t staticextendedwait;
-  uint32_t reserved_4 [31];
-  lpc32xx_emc_dynamic dynamic [EMC_DYN_CHIP_COUNT];
-  uint32_t reserved_5 [48];
-  lpc32xx_emc_static emcstatic [EMC_STATIC_CHIP_COUNT];
-  uint32_t reserved_6 [96];
-  lpc32xx_emc_ahb ahb [5];
-} lpc32xx_emc;
-
-typedef struct {
   union {
     uint32_t w32;
     uint16_t w16;
@@ -569,93 +533,95 @@
 
 typedef struct {
   lpc32xx_nand_slc nand_slc;
-  uint32_t reserved_0 [LPC32XX_RESERVED(0x20020000, 0x20084000, lpc32xx_nand_slc)];
+  LPC32XX_FILL(0x20020000, 0x20084000, lpc32xx_nand_slc);
   lpc32xx_ssp ssp_0;
-  uint32_t reserved_1 [LPC32XX_RESERVED(0x20084000, 0x20088000, lpc32xx_ssp)]; 
+  LPC32XX_FILL(0x20084000, 0x20088000, lpc32xx_ssp); 
   lpc32xx_spi spi_1;
-  uint32_t reserved_2 [LPC32XX_RESERVED(0x20088000, 0x2008c000, lpc32xx_spi)];
+  LPC32XX_FILL(0x20088000, 0x2008c000, lpc32xx_spi);
   lpc32xx_ssp ssp_1;
-  uint32_t reserved_3 [LPC32XX_RESERVED(0x2008c000, 0x20090000, lpc32xx_ssp)];
+  LPC32XX_FILL(0x2008c000, 0x20090000, lpc32xx_ssp);
   lpc32xx_spi spi_2;
-  uint32_t reserved_4 [LPC32XX_RESERVED(0x20090000, 0x20094000, lpc32xx_spi)];
+  LPC32XX_FILL(0x20090000, 0x20094000, lpc32xx_spi);
   lpc_i2s i2s_0;
-  uint32_t reserved_5 [LPC32XX_RESERVED(0x20094000, 0x20098000, lpc_i2s)];
+  LPC32XX_FILL(0x20094000, 0x20098000, lpc_i2s);
   lpc32xx_sd_card sd_card;
-  uint32_t reserved_6 [LPC32XX_RESERVED(0x20098000, 0x2009c000, lpc32xx_sd_card)];
+  LPC32XX_FILL(0x20098000, 0x2009c000, lpc32xx_sd_card);
   lpc_i2s i2s_1;
-  uint32_t reserved_7 [LPC32XX_RESERVED(0x2009c000, 0x200a8000, lpc_i2s)];
+  LPC32XX_FILL(0x2009c000, 0x200a8000, lpc_i2s);
   lpc32xx_nand_mlc nand_mlc;
-  uint32_t reserved_8 [LPC32XX_RESERVED(0x200a8000, 0x31000000, lpc32xx_nand_mlc)];
+  LPC32XX_FILL(0x200a8000, 0x31000000, lpc32xx_nand_mlc);
   lpc_dma dma;
-  uint32_t reserved_9 [LPC32XX_RESERVED(0x31000000, 0x31020000, lpc_dma)];
+  LPC32XX_FILL(0x31000000, 0x31020000, lpc_dma);
   lpc32xx_usb usb;
-  uint32_t reserved_10 [LPC32XX_RESERVED(0x31020000, 0x31040000, lpc32xx_usb)];
+  LPC32XX_FILL(0x31020000, 0x31040000, lpc32xx_usb);
   lpc32xx_lcd lcd;
-  uint32_t reserved_11 [LPC32XX_RESERVED(0x31040000, 0x31060000, lpc32xx_lcd)];
+  LPC32XX_FILL(0x31040000, 0x31060000, lpc32xx_lcd);
   lpc32xx_eth eth;
-  uint32_t reserved_12 [LPC32XX_RESERVED(0x31060000, 0x31080000, lpc32xx_eth)];
-  lpc32xx_emc emc;
-  uint32_t reserved_13 [LPC32XX_RESERVED(0x31080000, 0x310c0000, lpc32xx_emc)];
+  LPC32XX_FILL(0x31060000, 0x31080000, lpc32xx_eth);
+  lpc_emc emc;
+  LPC32XX_FILL(0x31080000, 0x31080400, lpc_emc);
+  lpc32xx_emc_ahb emc_ahb [5];
+  LPC32XX_FILL(0x31080400, 0x310c0000, lpc32xx_emc_ahb [5]);
   lpc32xx_etb etb;
-  uint32_t reserved_14 [LPC32XX_RESERVED(0x310c0000, 0x40004000, lpc32xx_etb)];
+  LPC32XX_FILL(0x310c0000, 0x40004000, lpc32xx_etb);
   lpc32xx_syscon syscon;
-  uint32_t reserved_15 [LPC32XX_RESERVED(0x40004000, 0x40008000, lpc32xx_syscon)];
+  LPC32XX_FILL(0x40004000, 0x40008000, lpc32xx_syscon);
   lpc32xx_irq mic;
-  uint32_t reserved_16 [LPC32XX_RESERVED(0x40008000, 0x4000c000, lpc32xx_irq)];
+  LPC32XX_FILL(0x40008000, 0x4000c000, lpc32xx_irq);
   lpc32xx_irq sic_1;
-  uint32_t reserved_17 [LPC32XX_RESERVED(0x4000c000, 0x40010000, lpc32xx_irq)];
+  LPC32XX_FILL(0x4000c000, 0x40010000, lpc32xx_irq);
   lpc32xx_irq sic_2;
-  uint32_t reserved_18 [LPC32XX_RESERVED(0x40010000, 0x40014000, lpc32xx_irq)];
+  LPC32XX_FILL(0x40010000, 0x40014000, lpc32xx_irq);
   lpc32xx_uart uart_1;
-  uint32_t reserved_19 [LPC32XX_RESERVED(0x40014000, 0x40018000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40014000, 0x40018000, lpc32xx_uart);
   lpc32xx_uart uart_2;
-  uint32_t reserved_20 [LPC32XX_RESERVED(0x40018000, 0x4001c000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40018000, 0x4001c000, lpc32xx_uart);
   lpc32xx_uart uart_7;
-  uint32_t reserved_21 [LPC32XX_RESERVED(0x4001c000, 0x40024000, lpc32xx_uart)];
+  LPC32XX_FILL(0x4001c000, 0x40024000, lpc32xx_uart);
   lpc32xx_rtc rtc;
-  uint32_t reserved_22 [LPC32XX_RESERVED(0x40024000, 0x40028000, lpc32xx_rtc)];
+  LPC32XX_FILL(0x40024000, 0x40028000, lpc32xx_rtc);
   lpc32xx_gpio gpio;
-  uint32_t reserved_23 [LPC32XX_RESERVED(0x40028000, 0x4002c000, lpc32xx_gpio)];
+  LPC32XX_FILL(0x40028000, 0x4002c000, lpc32xx_gpio);
   lpc_timer timer_4;
-  uint32_t reserved_24 [LPC32XX_RESERVED(0x4002c000, 0x40030000, lpc_timer)];
+  LPC32XX_FILL(0x4002c000, 0x40030000, lpc_timer);
   lpc_timer timer_5;
-  uint32_t reserved_25 [LPC32XX_RESERVED(0x40030000, 0x40034000, lpc_timer)];
+  LPC32XX_FILL(0x40030000, 0x40034000, lpc_timer);
   lpc32xx_ms_timer ms_timer;
-  uint32_t reserved_26 [LPC32XX_RESERVED(0x40034000, 0x40038000, lpc32xx_ms_timer)];
+  LPC32XX_FILL(0x40034000, 0x40038000, lpc32xx_ms_timer);
   lpc32xx_hs_timer hs_timer;
-  uint32_t reserved_27 [LPC32XX_RESERVED(0x40038000, 0x4003c000, lpc32xx_hs_timer)];
+  LPC32XX_FILL(0x40038000, 0x4003c000, lpc32xx_hs_timer);
   lpc32xx_wdt wdt;
-  uint32_t reserved_28 [LPC32XX_RESERVED(0x4003c000, 0x40040000, lpc32xx_wdt)];
+  LPC32XX_FILL(0x4003c000, 0x40040000, lpc32xx_wdt);
   lpc32xx_debug debug;
-  uint32_t reserved_29 [LPC32XX_RESERVED(0x40040000, 0x40044000, lpc32xx_debug)];
+  LPC32XX_FILL(0x40040000, 0x40044000, lpc32xx_debug);
   lpc_timer timer_0;
-  uint32_t reserved_30 [LPC32XX_RESERVED(0x40044000, 0x40048000, lpc_timer)];
+  LPC32XX_FILL(0x40044000, 0x40048000, lpc_timer);
   lpc32xx_adc adc;
-  uint32_t reserved_31 [LPC32XX_RESERVED(0x40048000, 0x4004c000, lpc32xx_adc)];
+  LPC32XX_FILL(0x40048000, 0x4004c000, lpc32xx_adc);
   lpc_timer timer_1;
-  uint32_t reserved_32 [LPC32XX_RESERVED(0x4004c000, 0x40050000, lpc_timer)];
+  LPC32XX_FILL(0x4004c000, 0x40050000, lpc_timer);
   lpc32xx_keyscan keyscan;
-  uint32_t reserved_33 [LPC32XX_RESERVED(0x40050000, 0x40054000, lpc32xx_keyscan)];
+  LPC32XX_FILL(0x40050000, 0x40054000, lpc32xx_keyscan);
   lpc32xx_uart_ctrl uart_ctrl;
-  uint32_t reserved_34 [LPC32XX_RESERVED(0x40054000, 0x40058000, lpc32xx_uart_ctrl)];
+  LPC32XX_FILL(0x40054000, 0x40058000, lpc32xx_uart_ctrl);
   lpc_timer timer_2;
-  uint32_t reserved_35 [LPC32XX_RESERVED(0x40058000, 0x4005c000, lpc_timer)];
+  LPC32XX_FILL(0x40058000, 0x4005c000, lpc_timer);
   lpc32xx_pwm pwm_1_and_pwm_2;
-  uint32_t reserved_36 [LPC32XX_RESERVED(0x4005c000, 0x40060000, lpc32xx_pwm)];
+  LPC32XX_FILL(0x4005c000, 0x40060000, lpc32xx_pwm);
   lpc_timer timer3;
-  uint32_t reserved_37 [LPC32XX_RESERVED(0x40060000, 0x40080000, lpc_timer)];
+  LPC32XX_FILL(0x40060000, 0x40080000, lpc_timer);
   lpc32xx_uart uart_3;
-  uint32_t reserved_38 [LPC32XX_RESERVED(0x40080000, 0x40088000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40080000, 0x40088000, lpc32xx_uart);
   lpc32xx_uart uart_4;
-  uint32_t reserved_39 [LPC32XX_RESERVED(0x40088000, 0x40090000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40088000, 0x40090000, lpc32xx_uart);
   lpc32xx_uart uart_5;
-  uint32_t reserved_40 [LPC32XX_RESERVED(0x40090000, 0x40098000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40090000, 0x40098000, lpc32xx_uart);
   lpc32xx_uart uart_6;
-  uint32_t reserved_41 [LPC32XX_RESERVED(0x40098000, 0x400a0000, lpc32xx_uart)];
+  LPC32XX_FILL(0x40098000, 0x400a0000, lpc32xx_uart);
   lpc32xx_i2c i2c_1;
-  uint32_t reserved_42 [LPC32XX_RESERVED(0x400a0000, 0x400a8000, lpc32xx_i2c)];
+  LPC32XX_FILL(0x400a0000, 0x400a8000, lpc32xx_i2c);
   lpc32xx_i2c i2c_2;
-  uint32_t reserved_43 [LPC32XX_RESERVED(0x400a8000, 0x400e8000, lpc32xx_i2c)];
+  LPC32XX_FILL(0x400a8000, 0x400e8000, lpc32xx_i2c);
   lpc32xx_mcpwm mcpwm;
 } lpc32xx_registers;
 

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c:1.2 rtems/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c:1.3
--- rtems/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c:1.2	Tue Sep 28 09:38:26 2010
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c	Thu May 19 07:11:36 2011
@@ -24,7 +24,9 @@
 #include <bsp.h>
 #include <bsp/mmu.h>
 
-static volatile lpc32xx_emc *const emc = &lpc32xx.emc;
+static volatile lpc_emc *const emc = &lpc32xx.emc;
+
+static volatile lpc32xx_emc_ahb *const emc_ahb = &lpc32xx.emc_ahb [0];
 
 static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
 {
@@ -95,17 +97,17 @@
   LPC32XX_HCLKDIV_CTRL |= HCLK_DIV_DDRAM_CLK(1);
 
   /* Enable buffers in AHB ports */
-  emc->ahb [0].control = EMC_AHB_PORT_BUFF_EN;
-  emc->ahb [3].control = EMC_AHB_PORT_BUFF_EN;
-  emc->ahb [4].control = EMC_AHB_PORT_BUFF_EN;
+  emc_ahb [0].control = EMC_AHB_PORT_BUFF_EN;
+  emc_ahb [3].control = EMC_AHB_PORT_BUFF_EN;
+  emc_ahb [4].control = EMC_AHB_PORT_BUFF_EN;
 
   /* Set AHB port timeouts */
-  emc->ahb [0].timeout = EMC_AHB_TIMEOUT(32);
-  emc->ahb [3].timeout = EMC_AHB_TIMEOUT(32);
-  emc->ahb [4].timeout = EMC_AHB_TIMEOUT(32);
+  emc_ahb [0].timeout = EMC_AHB_TIMEOUT(32);
+  emc_ahb [3].timeout = EMC_AHB_TIMEOUT(32);
+  emc_ahb [4].timeout = EMC_AHB_TIMEOUT(32);
 
   /* Enable EMC */
-  emc->control = EMC_CTRL_EN,
+  emc->control = EMC_CTRL_E,
   emc->config = 0;
 
   dynamic_init(dyn_cfg);

diff -u rtems/c/src/lib/libbsp/arm/lpc32xx/preinstall.am:1.8 rtems/c/src/lib/libbsp/arm/lpc32xx/preinstall.am:1.9
--- rtems/c/src/lib/libbsp/arm/lpc32xx/preinstall.am:1.8	Fri Dec  3 03:29:07 2010
+++ rtems/c/src/lib/libbsp/arm/lpc32xx/preinstall.am	Thu May 19 07:11:35 2011
@@ -102,6 +102,14 @@
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
 
+$(PROJECT_INCLUDE)/bsp/lpc-emc.h: ../shared/lpc/include/lpc-emc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-emc.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-emc.h
+
+$(PROJECT_INCLUDE)/bsp/lpc-lcd.h: ../shared/lpc/include/lpc-lcd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
+
 $(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h


 *sh*:
2011-05-19	Sebastian Huber <sebastian.huber at embedded-brains.de>

	* i2c/i2c-config.c: New file.
	* include/lcd.h: Removed EMC definitions.
	* misc/dma.c: Fixed initialization.
	* include/i2c.h, include/io.h, include/lpc-ethernet-config.h,
	include/lpc24xx.h, console/console-config.c, i2c/i2c.c, misc/io.c,
	misc/lcd.c, startup/bspstart.c, startup/bspstarthooks.c: New pin
	configuration API.
	* Makefile.am, preinstall.am: Update.

M   1.67  c/src/lib/libbsp/arm/lpc24xx/ChangeLog
M   1.32  c/src/lib/libbsp/arm/lpc24xx/Makefile.am
M    1.6  c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
A    1.1  c/src/lib/libbsp/arm/lpc24xx/i2c/i2c-config.c
M    1.5  c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c
M    1.3  c/src/lib/libbsp/arm/lpc24xx/include/i2c.h
M    1.5  c/src/lib/libbsp/arm/lpc24xx/include/io.h
M    1.2  c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
M    1.3  c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h
M   1.14  c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
M    1.8  c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
M    1.9  c/src/lib/libbsp/arm/lpc24xx/misc/io.c
M    1.2  c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c
M   1.21  c/src/lib/libbsp/arm/lpc24xx/preinstall.am
M   1.10  c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
M    1.9  c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/ChangeLog:1.66 rtems/c/src/lib/libbsp/arm/lpc24xx/ChangeLog:1.67
--- rtems/c/src/lib/libbsp/arm/lpc24xx/ChangeLog:1.66	Wed Mar 16 12:13:20 2011
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/ChangeLog	Thu May 19 07:30:00 2011
@@ -1,3 +1,14 @@
+2011-05-19	Sebastian Huber <sebastian.huber at embedded-brains.de>
+
+	* i2c/i2c-config.c: New file.
+	* include/lcd.h: Removed EMC definitions.
+	* misc/dma.c: Fixed initialization.
+	* include/i2c.h, include/io.h, include/lpc-ethernet-config.h,
+	include/lpc24xx.h, console/console-config.c, i2c/i2c.c, misc/io.c,
+	misc/lcd.c, startup/bspstart.c, startup/bspstarthooks.c: New pin
+	configuration API.
+	* Makefile.am, preinstall.am: Update.
+
 2011-03-16	Joel Sherrill <joel.sherrill at oarcorp.com>
 
 	* README: Add example mkimage command.

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/Makefile.am:1.31 rtems/c/src/lib/libbsp/arm/lpc24xx/Makefile.am:1.32
--- rtems/c/src/lib/libbsp/arm/lpc24xx/Makefile.am:1.31	Mon Feb 21 06:56:34 2011
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/Makefile.am	Thu May 19 07:30:00 2011
@@ -37,6 +37,9 @@
 include_bsp_HEADERS += ../shared/include/start.h
 include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
 include_bsp_HEADERS += ../shared/lpc/include/lpc-i2s.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-emc.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-lcd.h
 include_bsp_HEADERS += include/irq.h
 include_bsp_HEADERS += include/lpc24xx.h
 include_bsp_HEADERS += include/system-clocks.h
@@ -131,7 +134,8 @@
 libbsp_a_SOURCES += ssp/ssp.c
 
 # I2C
-libbsp_a_SOURCES += i2c/i2c.c
+libbsp_a_SOURCES += i2c/i2c.c \
+	i2c/i2c-config.c
 
 # Cache
 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c \

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c:1.5 rtems/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c:1.6
--- rtems/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c:1.5	Tue Dec 15 09:20:46 2009
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * rtems at embedded-brains.de
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be found in the file
  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
@@ -24,8 +25,9 @@
 #include <bsp.h>
 #include <bsp/lpc24xx.h>
 #include <bsp/irq.h>
+#include <bsp/io.h>
 
-static uint8_t lpc24xx_uart_register(uint32_t addr, uint8_t i)
+static uint8_t lpc24xx_uart_get_register(uint32_t addr, uint8_t i)
 {
   volatile uint32_t *reg = (volatile uint32_t *) addr;
 
@@ -39,6 +41,54 @@
   reg [i] = val;
 }
 
+#ifdef LPC24XX_CONFIG_UART_1
+  static bool lpc24xx_uart_probe_1(int minor)
+  {
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_UART_1_TXD_P0_15,
+      LPC24XX_PIN_UART_1_RXD_P0_16,
+      LPC24XX_PIN_TERMINAL
+    };
+
+    lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_CCLK);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+
+    return true;
+  }
+#endif
+
+#ifdef LPC24XX_CONFIG_UART_2
+  static bool lpc24xx_uart_probe_2(int minor)
+  {
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_UART_2_TXD_P0_10,
+      LPC24XX_PIN_UART_2_RXD_P0_11,
+      LPC24XX_PIN_TERMINAL
+    };
+
+    lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_CCLK);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+
+    return true;
+  }
+#endif
+
+#ifdef LPC24XX_CONFIG_UART_3
+  static bool lpc24xx_uart_probe_3(int minor)
+  {
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_UART_3_TXD_P0_0,
+      LPC24XX_PIN_UART_3_RXD_P0_1,
+      LPC24XX_PIN_TERMINAL
+    };
+
+    lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_CCLK);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+
+    return true;
+  }
+#endif
+
 rtems_device_minor_number Console_Port_Minor = 0;
 
 console_tbl Console_Port_Tbl [] = {
@@ -55,7 +105,7 @@
       .ulCtrlPort1 = UART0_BASE_ADDR,
       .ulCtrlPort2 = 0,
       .ulDataPort = UART0_BASE_ADDR,
-      .getRegister = lpc24xx_uart_register,
+      .getRegister = lpc24xx_uart_get_register,
       .setRegister = lpc24xx_uart_set_register,
       .getData = NULL,
       .setData = NULL,
@@ -68,7 +118,7 @@
       .sDeviceName = "/dev/ttyS1",
       .deviceType = SERIAL_NS16550,
       .pDeviceFns = &ns16550_fns,
-      .deviceProbe = NULL,
+      .deviceProbe = lpc24xx_uart_probe_1,
       .pDeviceFlow = NULL,
       .ulMargin = 16,
       .ulHysteresis = 8,
@@ -76,7 +126,7 @@
       .ulCtrlPort1 = UART1_BASE_ADDR,
       .ulCtrlPort2 = 0,
       .ulDataPort = UART1_BASE_ADDR,
-      .getRegister = lpc24xx_uart_register,
+      .getRegister = lpc24xx_uart_get_register,
       .setRegister = lpc24xx_uart_set_register,
       .getData = NULL,
       .setData = NULL,
@@ -89,7 +139,7 @@
       .sDeviceName = "/dev/ttyS2",
       .deviceType = SERIAL_NS16550,
       .pDeviceFns = &ns16550_fns,
-      .deviceProbe = NULL,
+      .deviceProbe = lpc24xx_uart_probe_2,
       .pDeviceFlow = NULL,
       .ulMargin = 16,
       .ulHysteresis = 8,
@@ -97,7 +147,7 @@
       .ulCtrlPort1 = UART2_BASE_ADDR,
       .ulCtrlPort2 = 0,
       .ulDataPort = UART2_BASE_ADDR,
-      .getRegister = lpc24xx_uart_register,
+      .getRegister = lpc24xx_uart_get_register,
       .setRegister = lpc24xx_uart_set_register,
       .getData = NULL,
       .setData = NULL,
@@ -110,7 +160,7 @@
       .sDeviceName = "/dev/ttyS3",
       .deviceType = SERIAL_NS16550,
       .pDeviceFns = &ns16550_fns,
-      .deviceProbe = NULL,
+      .deviceProbe = lpc24xx_uart_probe_3,
       .pDeviceFlow = NULL,
       .ulMargin = 16,
       .ulHysteresis = 8,
@@ -118,7 +168,7 @@
       .ulCtrlPort1 = UART3_BASE_ADDR,
       .ulCtrlPort2 = 0,
       .ulDataPort = UART3_BASE_ADDR,
-      .getRegister = lpc24xx_uart_register,
+      .getRegister = lpc24xx_uart_get_register,
       .setRegister = lpc24xx_uart_set_register,
       .getData = NULL,
       .setData = NULL,
@@ -128,9 +178,9 @@
   #endif
 };
 
-#define LPC24XX_UART_NUMBER \
+#define LPC24XX_UART_COUNT \
   (sizeof(Console_Port_Tbl) / sizeof(Console_Port_Tbl [0]))
 
-unsigned long Console_Port_Count = LPC24XX_UART_NUMBER;
+unsigned long Console_Port_Count = LPC24XX_UART_COUNT;
 
-console_data Console_Port_Data [LPC24XX_UART_NUMBER];
+console_data Console_Port_Data [LPC24XX_UART_COUNT];

diff -u /dev/null rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c-config.c:1.1
--- /dev/null	Thu May 19 08:11:44 2011
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c-config.c	Thu May 19 07:30:00 2011
@@ -0,0 +1,91 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx_libi2c
+ *
+ * @brief LibI2C bus driver for the I2C modules.
+ */
+
+/*
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bspopts.h>
+#include <bsp/i2c.h>
+#include <bsp/irq.h>
+
+#ifdef LPC24XX_CONFIG_I2C_0
+  static const lpc24xx_pin_range lpc24xx_i2c_pins_0 [] = {
+    LPC24XX_PIN_I2C_0_SDA,
+    LPC24XX_PIN_I2C_0_SCL,
+    LPC24XX_PIN_TERMINAL
+  };
+
+  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_0 = {
+    .bus = {
+      .ops = &lpc24xx_i2c_ops,
+      .size = sizeof(lpc24xx_i2c_bus_entry)
+    },
+    .regs = (volatile lpc24xx_i2c *) I2C0_BASE_ADDR,
+    .index = 0,
+    .pins = &lpc24xx_i2c_pins_0 [0],
+    .vector = LPC24XX_IRQ_I2C_0
+  };
+
+  rtems_libi2c_bus_t * const lpc24xx_i2c_0 =
+    &lpc24xx_i2c_entry_0.bus;
+#endif
+
+#ifdef LPC24XX_CONFIG_I2C_1
+  static const lpc24xx_pin_range lpc24xx_i2c_pins_1 [] = {
+    LPC24XX_PIN_I2C_1_SDA_P0_19,
+    LPC24XX_PIN_I2C_1_SCL_P0_20,
+    LPC24XX_PIN_TERMINAL
+  };
+
+  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_1 = {
+    .bus = {
+      .ops = &lpc24xx_i2c_ops,
+      .size = sizeof(lpc24xx_i2c_bus_entry)
+    },
+    .regs = (volatile lpc24xx_i2c *) I2C1_BASE_ADDR,
+    .index = 1,
+    .pins = &lpc24xx_i2c_pins_1 [0],
+    .vector = LPC24XX_IRQ_I2C_1
+  };
+
+  rtems_libi2c_bus_t * const lpc24xx_i2c_1 =
+    &lpc24xx_i2c_entry_1.bus;
+#endif
+
+#ifdef LPC24XX_CONFIG_I2C_2
+  static const lpc24xx_pin_range lpc24xx_i2c_pins_2 [] = {
+    LPC24XX_PIN_I2C_2_SDA_P0_10,
+    LPC24XX_PIN_I2C_2_SCL_P0_11,
+    LPC24XX_PIN_TERMINAL
+  };
+
+  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_2 = {
+    .bus = {
+      .ops = &lpc24xx_i2c_ops,
+      .size = sizeof(lpc24xx_i2c_bus_entry)
+    },
+    .regs = (volatile lpc24xx_i2c *) I2C2_BASE_ADDR,
+    .index = 2,
+    .pins = &lpc24xx_i2c_pins_2 [0],
+    .vector = LPC24XX_IRQ_I2C_2
+  };
+
+  rtems_libi2c_bus_t * const lpc24xx_i2c_2 =
+    &lpc24xx_i2c_entry_2.bus;
+#endif

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c:1.4 rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c:1.5
--- rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c:1.4	Tue Dec 15 09:20:46 2009
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/i2c/i2c.c	Thu May 19 07:30:00 2011
@@ -7,43 +7,29 @@
  */
 
 /*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
  * http://www.rtems.com/license/LICENSE.
  */
 
-#include <rtems.h>
-
 #include <bsp.h>
 #include <bsp/i2c.h>
-#include <bsp/io.h>
 #include <bsp/irq.h>
 #include <bsp/irq-generic.h>
-#include <bsp/lpc24xx.h>
 #include <bsp/system-clocks.h>
 
 #define RTEMS_STATUS_CHECKS_USE_PRINTK
 
 #include <rtems/status-checks.h>
 
-typedef struct {
-  rtems_libi2c_bus_t bus;
-  volatile lpc24xx_i2c *regs;
-  unsigned index;
-  unsigned config;
-  rtems_vector_number vector;
-  rtems_id state_update;
-  uint8_t * volatile data;
-  uint8_t * volatile end;
-} lpc24xx_i2c_bus_entry;
-
 static void lpc24xx_i2c_handler(void *arg)
 {
   lpc24xx_i2c_bus_entry *e = arg;
@@ -131,9 +117,9 @@
   sc = lpc24xx_module_enable(LPC24XX_MODULE_I2C_0 + e->index, LPC24XX_MODULE_CCLK_8);
   RTEMS_CHECK_SC(sc, "enable module");
 
-  /* IO configuration */
-  sc = lpc24xx_io_config(LPC24XX_MODULE_I2C_0 + e->index, e->config);
-  RTEMS_CHECK_SC(sc, "IO configuration");
+  /* Pin configuration */
+  sc = lpc24xx_pin_config(e->pins, LPC24XX_PIN_SET_FUNCTION);
+  RTEMS_CHECK_SC(sc, "pin configuration");
 
   /* Clock high and low duty cycles */
   regs->sclh = cycles;
@@ -327,7 +313,7 @@
   return rv;
 }
 
-static const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops = {
+const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops = {
   .init = lpc24xx_i2c_init,
   .send_start = lpc24xx_i2c_send_start,
   .send_stop = lpc24xx_i2c_send_stop,
@@ -336,51 +322,3 @@
   .write_bytes = lpc24xx_i2c_write,
   .ioctl = lpc24xx_i2c_ioctl
 };
-
-#ifdef LPC24XX_CONFIG_I2C_0
-  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_0 = {
-    .bus = {
-      .ops = &lpc24xx_i2c_ops,
-      .size = sizeof(lpc24xx_i2c_bus_entry)
-    },
-    .regs = (volatile lpc24xx_i2c *) I2C0_BASE_ADDR,
-    .index = 0,
-    .config = LPC24XX_CONFIG_I2C_0,
-    .vector = LPC24XX_IRQ_I2C_0
-  };
-
-  rtems_libi2c_bus_t * const lpc24xx_i2c_0 =
-    (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_0;
-#endif
-
-#ifdef LPC24XX_CONFIG_I2C_1
-  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_1 = {
-    .bus = {
-      .ops = &lpc24xx_i2c_ops,
-      .size = sizeof(lpc24xx_i2c_bus_entry)
-    },
-    .regs = (volatile lpc24xx_i2c *) I2C1_BASE_ADDR,
-    .index = 1,
-    .config = LPC24XX_CONFIG_I2C_1,
-    .vector = LPC24XX_IRQ_I2C_1
-  };
-
-  rtems_libi2c_bus_t * const lpc24xx_i2c_1 =
-    (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_1;
-#endif
-
-#ifdef LPC24XX_CONFIG_I2C_2
-  static lpc24xx_i2c_bus_entry lpc24xx_i2c_entry_2 = {
-    .bus = {
-      .ops = &lpc24xx_i2c_ops,
-      .size = sizeof(lpc24xx_i2c_bus_entry)
-    },
-    .regs = (volatile lpc24xx_i2c *) I2C2_BASE_ADDR,
-    .index = 2,
-    .config = LPC24XX_CONFIG_I2C_2,
-    .vector = LPC24XX_IRQ_I2C_2
-  };
-
-  rtems_libi2c_bus_t * const lpc24xx_i2c_2 =
-    (rtems_libi2c_bus_t *) &lpc24xx_i2c_entry_2;
-#endif

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h:1.2 rtems/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h:1.3
--- rtems/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h:1.2	Fri Sep 18 03:05:40 2009
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -22,8 +23,12 @@
 #ifndef LIBBSP_ARM_LPC24XX_I2C_H
 #define LIBBSP_ARM_LPC24XX_I2C_H
 
+#include <rtems.h>
 #include <rtems/libi2c.h>
 
+#include <bsp/io.h>
+#include <bsp/lpc24xx.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif /* __cplusplus */
@@ -38,11 +43,24 @@
  * @{
  */
 
-extern rtems_libi2c_bus_t * const lpc24xx_i2c_0;
+typedef struct {
+  rtems_libi2c_bus_t bus;
+  volatile lpc24xx_i2c *regs;
+  size_t index;
+  const lpc24xx_pin_range *pins;
+  rtems_vector_number vector;
+  rtems_id state_update;
+  uint8_t *volatile data;
+  uint8_t *volatile end;
+} lpc24xx_i2c_bus_entry;
+
+extern const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops;
+
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_0;
 
-extern rtems_libi2c_bus_t * const lpc24xx_i2c_1;
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_1;
 
-extern rtems_libi2c_bus_t * const lpc24xx_i2c_2;
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_2;
 
 /** @} */
 

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/include/io.h:1.4 rtems/c/src/lib/libbsp/arm/lpc24xx/include/io.h:1.5
--- rtems/c/src/lib/libbsp/arm/lpc24xx/include/io.h:1.4	Fri Dec  3 03:56:47 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/include/io.h	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -37,65 +38,6 @@
  *
  * @brief Input and output module.
  *
- * <table>
- *   <tr><th>Module</th><th>Configuration</th><th>First Pin</th><th>Last Pin</th></tr>
- *   <tr><td>UART 0</td><td>0</td><td>P0.2</td><td>P0.3</td></tr>
- *   <tr><td rowspan=3>UART 1</td><td>0</td><td>P0.15</td><td>P0.16</td></tr>
- *   <tr><td>1</td><td>P2.0</td><td>P2.1</td></tr>
- *   <tr><td>2</td><td>P3.16</td><td>P3.17</td></tr>
- *   <tr><td rowspan=3>UART 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>
- *   <tr><td>1</td><td>P2.8</td><td>P2.9</td></tr>
- *   <tr><td>2</td><td>P4.22</td><td>P4.23</td></tr>
- *   <tr><td rowspan=3>UART 3</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>
- *   <tr><td>1</td><td>P0.25</td><td>P0.26</td></tr>
- *   <tr><td>2</td><td>P4.28</td><td>P4.29</td></tr>
- *   <tr><td rowspan=5>ETHERNET</td><td>0</td><td>P1.0</td><td>P1.17</td></tr>
- *   <tr><td rowspan=4>1</td><td>P1.0</td><td>P1.1</td></tr>
- *   <tr><td>P1.4</td><td>P1.4</td></tr>
- *   <tr><td>P1.8</td><td>P1.10</td></tr>
- *   <tr><td>P1.14</td><td>P1.17</td></tr>
- *   <tr><td rowspan=4>ADC</td><td>0</td><td>P0.12</td><td>P0.13</td></tr>
- *   <tr><td>1</td><td>P0.23</td><td>P0.25</td></tr>
- *   <tr><td rowspan=2>2</td><td>P0.26</td><td>P0.26</td></tr>
- *   <tr><td>P1.30</td><td>P1.31</td></tr>
- *   <tr><td>I2C 0</td><td>0</td><td>P0.27</td><td>P0.28</td></tr>
- *   <tr><td rowspan=3>I2C 1</td><td>0</td><td>P0.0</td><td>P0.1</td></tr>
- *   <tr><td>1</td><td>P0.19</td><td>P0.20</td></tr>
- *   <tr><td>2</td><td>P2.14</td><td>P2.15</td></tr>
- *   <tr><td rowspan=3>I2C 2</td><td>0</td><td>P0.10</td><td>P0.11</td></tr>
- *   <tr><td>1</td><td>P2.30</td><td>P2.31</td></tr>
- *   <tr><td>2</td><td>P4.20</td><td>P4.21</td></tr>
- *   <tr><td rowspan=3>I2S</td><td>0</td><td>P0.4</td><td>P0.9</td></tr>
- *   <tr><td rowspan=2>1</td><td>P0.23</td><td>P0.25</td></tr>
- *   <tr><td>P2.11</td><td>P2.13</td></tr>
- *   <tr><td rowspan=5>SSP 0</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>
- *   <tr><td rowspan=2>1</td><td>P1.20</td><td>P0.21</td></tr>
- *   <tr><td>P1.23</td><td>P0.24</td></tr>
- *   <tr><td rowspan=2>2</td><td>P2.22</td><td>P2.23</td></tr>
- *   <tr><td>P2.26</td><td>P2.27</td></tr>
- *   <tr><td rowspan=5>SSP 1</td><td>0</td><td>P0.6</td><td>P0.9</td></tr>
- *   <tr><td rowspan=3>1</td><td>P0.12</td><td>P0.13</td></tr>
- *   <tr><td>P0.14</td><td>P0.14</td></tr>
- *   <tr><td>P1.31</td><td>P1.31</td></tr>
- *   <tr><td>2</td><td>P4.20</td><td>P4.23</td></tr>
- *   <tr><td rowspan=2>USB</td><td rowspan=2>0</td><td>P0.29</td><td>P0.30</td></tr>
- *   <tr><td>P1.19</td><td>P1.19</td></tr>
- *   <tr><td>SPI</td><td>0</td><td>P0.15</td><td>P0.18</td></tr>
- *   <tr><td>PWM 1</td><td>0</td><td>P2.0</td><td>P2.0</td></tr>
- *   <tr><td rowspan=11>LCD</td><td rowspan=6>0</td><td>P0.4</td><td>P0.9</td></tr>
- *   <tr><td>P1.20</td><td>P1.29</td></tr>
- *   <tr><td>P2.0</td><td>P2.3</td></tr>
- *   <tr><td>P2.5</td><td>P2.9</td></tr>
- *   <tr><td>P2.12</td><td>P2.13</td></tr>
- *   <tr><td>P4.28</td><td>P4.29</td></tr>
- *   <tr><td rowspan=5>1</td><td>P1.20</td><td>P1.29</td></tr>
- *   <tr><td>P2.0</td><td>P2.3</td></tr>
- *   <tr><td>P2.5</td><td>P2.9</td></tr>
- *   <tr><td>P2.12</td><td>P2.13</td></tr>
- *   <tr><td>P4.28</td><td>P4.29</td></tr>
- *   <tr><td>DAC</td><td>0</td><td>P0.26</td><td>P0.26</td></tr>
- * </table>
- *
  * @{
  */
 
@@ -182,33 +124,6 @@
   lpc24xx_module module
 );
 
-/**
- * @brief Applies the configuration with index @a config for the @a module.
- *
- * The pin mode will not be altered.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid module or configuration.
- */
-rtems_status_code lpc24xx_io_config(
-  lpc24xx_module module,
-  unsigned config
-);
-
-/**
- * @brief Releases the configuration with index @a config for the @a module.
- *
- * The pins are set to general purpose IO function.  The pin mode will not be
- * altered.
- *
- * @retval RTEMS_SUCCESSFUL Successful operation.
- * @retval RTEMS_INVALID_ID Invalid module or configuration.
- */
-rtems_status_code lpc24xx_io_release(
-  lpc24xx_module module,
-  unsigned config
-);
-
 rtems_status_code lpc24xx_gpio_config(
   unsigned index,
   lpc24xx_gpio_settings settings
@@ -255,6 +170,650 @@
   }
 }
 
+typedef enum {
+  /**
+   * @brief Sets the pin function.
+   */
+  LPC24XX_PIN_SET_FUNCTION = 0,
+
+  /**
+   * @brief Checks if all pins are configured with the specified function.
+   */
+  LPC24XX_PIN_CHECK_FUNCTION,
+
+  /**
+   * @brief Configures the pins as input.
+   */
+  LPC24XX_PIN_SET_INPUT,
+
+  /**
+   * @brief Checks if all pins are configured as input.
+   */
+  LPC24XX_PIN_CHECK_INPUT
+} lpc24xx_pin_action;
+
+typedef union {
+  struct {
+    uint16_t port : 3;
+    uint16_t index_begin : 5;
+    uint16_t index_last : 5;
+    uint16_t function : 3;
+  } fields;
+  uint16_t value;
+} lpc24xx_pin_range;
+
+#define LPC24XX_PIN_FUNCTION_00 0x0
+#define LPC24XX_PIN_FUNCTION_01 0x1
+#define LPC24XX_PIN_FUNCTION_10 0x2
+#define LPC24XX_PIN_FUNCTION_11 0x3
+
+#define LPC24XX_PIN(p, i, f) { { p, i, i, f } }
+
+#define LPC24XX_PIN_RANGE(p, i, j, f) { { p, i, j, f } }
+
+#define LPC24XX_PIN_TERMINAL { { 0x3, 0x1f, 0x1f, 0x3 } }
+
+/**
+ * @brief Performs the @a action with the @a pins
+ *
+ * @code
+ * #include <assert.h>
+ * #include <bsp/io.h>
+ * 
+ * void example(void)
+ * {
+ *   static const lpc24xx_pin_range pins [] = {
+ *     LPC24XX_PIN_I2S_RX_CLK_P0_4,
+ *     LPC24XX_PIN_I2S_RX_WS_P0_5,
+ *     LPC24XX_PIN_I2S_RX_SDA_P0_6,
+ *     LPC24XX_PIN_I2S_TX_CLK_P0_7,
+ *     LPC24XX_PIN_I2S_TX_WS_P0_8,
+ *     LPC24XX_PIN_I2S_TX_SDA_P0_9,
+ *     LPC24XX_PIN_TERMINAL
+ *   };
+ *   rtems_status_code sc = RTEMS_SUCCESSFUL;
+ * 
+ *   sc = lpc24xx_module_enable(LPC24XX_MODULE_I2S, LPC24XX_MODULE_CCLK_8);
+ *   assert(sc == RTEMS_SUCCESSFUL);
+ *   sc = lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+ *   assert(sc == RTEMS_SUCCESSFUL);
+ * }
+ * @endcode
+ *
+ * @retval RTEMS_SUCCESSFUL Successful operation.
+ * @retval RTEMS_IO_ERROR Check failed.
+ * @retval RTEMS_NOT_DEFINED Invalid action.
+ */
+rtems_status_code lpc24xx_pin_config(
+  const lpc24xx_pin_range *pins,
+  lpc24xx_pin_action action
+);
+
+/**
+ * @name ADC Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_ADC_CHANNEL_0 \
+  LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ADC_CHANNEL_1 \
+  LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ADC_CHANNEL_2 \
+  LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ADC_CHANNEL_3 \
+  LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ADC_CHANNEL_4 \
+  LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_ADC_CHANNEL_5 \
+  LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_ADC_CHANNEL_6 \
+  LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_ADC_CHANNEL_7 \
+  LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name DAC Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_DAC \
+  LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name Ethernet Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_ETHERNET_MII \
+  LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01)
+
+#define LPC24XX_PIN_ETHERNET_RMII_0 \
+  LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ETHERNET_RMII_1 \
+  LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ETHERNET_RMII_2 \
+  LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_ETHERNET_RMII_3 \
+  LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01)
+
+/** @} */
+
+/**
+ * @name I2C 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_0_SDA \
+  LPC24XX_PIN(0, 27, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2C_0_SCL \
+  LPC24XX_PIN(0, 28, LPC24XX_PIN_FUNCTION_01)
+
+/** @} */
+
+/**
+ * @name I2C 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_1_SDA_P0_0 \
+  LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_1_SDA_P0_19 \
+  LPC24XX_PIN(0, 19, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_1_SDA_P2_14 \
+  LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_I2C_1_SCL_P0_20 \
+  LPC24XX_PIN(0, 20, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_1_SCL_P0_1 \
+  LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_1_SCL_P2_15 \
+  LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name I2C 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_2_SDA_P0_10 \
+  LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_I2C_2_SDA_P2_30 \
+  LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_2_SDA_P4_20 \
+  LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_I2C_2_SCL_P2_31 \
+  LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_I2C_2_SCL_P0_11 \
+  LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_I2C_2_SCL_P4_21 \
+  LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name I2S Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2S_RX_CLK_P0_4 \
+  LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_RX_CLK_P0_23 \
+  LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_I2S_RX_WS_P0_5 \
+  LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_RX_WS_P0_24 \
+  LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_I2S_RX_SDA_P0_6 \
+  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_RX_SDA_P0_25 \
+  LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_I2S_TX_CLK_P0_7 \
+  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_TX_CLK_P2_11 \
+  LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_I2S_TX_WS_P0_8 \
+  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_TX_WS_P2_12 \
+  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_I2S_TX_SDA_P0_9 \
+  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_I2S_TX_SDA_P2_13 \
+  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name LCD Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_LCD_PWR \
+  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_LE \
+  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_DCLK \
+  LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_FP \
+  LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_ENAB_M \
+  LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_LP \
+  LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_CLKIN \
+  LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01)
+
+#define LPC24XX_PIN_LCD_VD_P0_4 \
+  LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P0_5 \
+  LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P0_6 \
+  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P0_7 \
+  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P0_8 \
+  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P0_9 \
+  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_20 \
+  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_21 \
+  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_22 \
+  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_23 \
+  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_24 \
+  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_25 \
+  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_26 \
+  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_27 \
+  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_28 \
+  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P1_29 \
+  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P2_6 \
+  LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_VD_P2_7 \
+  LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_VD_P2_8 \
+  LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_VD_P2_9 \
+  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_LCD_VD_P2_12 \
+  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P2_13 \
+  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_LCD_VD_P4_28 \
+  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_LCD_VD_P4_29 \
+  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name PWM 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_1_P1_2 \
+  LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_1_P3_16 \
+  LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_2_P1_3 \
+  LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_2_P3_17 \
+  LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_3_P1_5 \
+  LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_3_P3_18 \
+  LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_4_P1_6 \
+  LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_4_P3_19 \
+  LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_5_P1_7 \
+  LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_5_P3_20 \
+  LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_6_P1_11 \
+  LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CHANNEL_6_P3_21 \
+  LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_PWM_0_CAPTURE_0_P1_12 \
+  LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_PWM_0_CAPTURE_0_P3_22 \
+  LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name PWM 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P1_18 \
+  LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P2_0 \
+  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P3_24 \
+  LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P1_20 \
+  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P2_1 \
+  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P3_25 \
+  LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P1_21 \
+  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P2_2 \
+  LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P3_26 \
+  LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P1_23 \
+  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P2_3 \
+  LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P3_27 \
+  LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P1_24 \
+  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P2_4 \
+  LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P3_28 \
+  LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P1_26 \
+  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P2_5 \
+  LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P3_29 \
+  LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11)
+
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P1_28 \
+  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P2_7 \
+  LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P3_23 \
+  LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_PWM_1_CAPTURE_1_P1_29 \
+  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name SPI Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SPI_SCK \
+  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_SSEL \
+  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MISO \
+  LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MOSI \
+  LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name SSP 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_0_SCK_P0_15 \
+  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_0_SCK_P1_20 \
+  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SSP_0_SCK_P2_22 \
+  LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_0_SSEL_P0_16 \
+  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_0_SSEL_P1_21 \
+  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SSP_0_SSEL_P2_23 \
+  LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_0_MISO_P0_17 \
+  LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_0_MISO_P1_23 \
+  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SSP_0_MISO_P2_26 \
+  LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_0_MOSI_P0_18 \
+  LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_0_MOSI_P1_24 \
+  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SSP_0_MOSI_P2_27 \
+  LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name SSP 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_1_SCK_P0_6 \
+  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_SCK_P0_12 \
+  LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_SCK_P4_20 \
+  LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_1_SSEL_P0_7 \
+  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_SSEL_P0_13 \
+  LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_SSEL_P4_21 \
+  LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_1_MISO_P0_8 \
+  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_MISO_P0_14 \
+  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SSP_1_MISO_P4_22 \
+  LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_SSP_1_MOSI_P0_9 \
+  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_MOSI_P1_31 \
+  LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_SSP_1_MOSI_P4_23 \
+  LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name UART 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_0_TXD \
+  LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01)
+
+#define LPC24XX_PIN_UART_0_RXD \
+  LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01)
+
+/** @} */
+
+/**
+ * @name UART 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_1_TXD_P0_15 \
+  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_UART_1_TXD_P2_0 \
+  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_1_TXD_P3_16 \
+  LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_UART_1_RXD_P0_16 \
+  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_UART_1_RXD_P2_1 \
+  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_1_RXD_P3_17 \
+  LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name UART 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_2_TXD_P0_10 \
+  LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_UART_2_TXD_P2_8 \
+  LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_2_TXD_P4_22 \
+  LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10)
+
+#define LPC24XX_PIN_UART_2_RXD_P0_11 \
+  LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_UART_2_RXD_P2_9 \
+  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_2_RXD_P4_23 \
+  LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10)
+
+/** @} */
+
+/**
+ * @name UART 3 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_3_TXD_P0_0 \
+  LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_3_TXD_P0_25 \
+  LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_UART_3_TXD_P4_28 \
+  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11)
+
+#define LPC24XX_PIN_UART_3_RXD_P0_1 \
+  LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_UART_3_RXD_P0_25 \
+  LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_UART_3_RXD_P4_29 \
+  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+/**
+ * @name USB Port 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_USB_D_PLUS_1\
+  LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_D_MINUS_1\
+  LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_UP_LED_1\
+  LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_TX_E_1\
+  LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_PPWR_1\
+  LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_USB_TX_DP_1\
+  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_TX_DM_1\
+  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_RCV_1\
+  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_PWRD_1\
+  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_USB_RX_DP_1\
+  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_RX_DM_1\
+  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_LS_1\
+  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_HSTEN_1\
+  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_USB_SSPND_1\
+  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_INT_1\
+  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_OVRCR_1\
+  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_USB_SCL_1\
+  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_SDA_1\
+  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_CONNECT_1\
+  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01)
+
+/** @} */
+
+/**
+ * @name USB Port 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_USB_PPWR_2\
+  LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_UP_LED_2\
+  LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_HSTEN_2\
+  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_CONNECT_2\
+  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_D_PLUS_2\
+  LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_10)
+#define LPC24XX_PIN_USB_PWRD_2\
+  LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01)
+#define LPC24XX_PIN_USB_OVRCR_2\
+  LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01)
+
+/** @} */
+
 /** @} */
 
 #ifdef __cplusplus

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h:1.1 rtems/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h:1.2
--- rtems/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h:1.1	Fri Dec  3 03:56:48 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h	Thu May 19 07:30:00 2011
@@ -25,6 +25,8 @@
 
 #include <rtems.h>
 
+#include <bsp/io.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -54,16 +56,16 @@
 /**
  * @brief Set the LCD @a mode.
  *
- * The pins are configured according to the @a pin_config.
+ * The pins are configured according to @a pins.
  *
- * @see lpc24xx_io_config() and lpc24xx_io_release().
+ * @see lpc24xx_pin_config().
  *
  * @retval RTEMS_SUCCESSFUL Successful operation.
  * @retval RTEMS_IO_ERROR Invalid mode.
  */
 rtems_status_code lpc24xx_lcd_set_mode(
   lpc24xx_lcd_mode mode,
-  unsigned pin_config
+  const lpc24xx_pin_range *pins
 );
 
 lpc24xx_lcd_mode lpc24xx_lcd_current_mode(void);

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h:1.2 rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h:1.3
--- rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h:1.2	Fri Mar 12 02:25:53 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -47,14 +48,27 @@
 
   static void lpc_eth_config_module_enable(void)
   {
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_ETHERNET_RMII_0,
+      LPC24XX_PIN_ETHERNET_RMII_1,
+      LPC24XX_PIN_ETHERNET_RMII_2,
+      LPC24XX_PIN_ETHERNET_RMII_3,
+      LPC24XX_PIN_TERMINAL
+    };
+
     lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
-    lpc24xx_io_config(LPC24XX_MODULE_ETHERNET, 1);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
   }
 #else
   static void lpc_eth_config_module_enable(void)
   {
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_ETHERNET_MII,
+      LPC24XX_PIN_TERMINAL
+    };
+
     lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
-    lpc24xx_io_config(LPC24XX_MODULE_ETHERNET, 0);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
   }
 #endif
 

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h:1.13 rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h:1.14
--- rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h:1.13	Fri Dec  3 03:56:48 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h	Thu May 19 07:30:00 2011
@@ -1913,30 +1913,6 @@
 #define SET_AHBCFG_EP5(reg, val) \
   SET_FIELD(reg, val, AHBCFG_EP5_MASK, 28)
 
-/* EMC */
-
-#define EMC_DYN_CTRL_CE 0x00000001U
-
-#define EMC_DYN_CTRL_CS 0x00000002U
-
-#define EMC_DYN_CTRL_CMD_NORMAL 0x00000000U
-
-#define EMC_DYN_CTRL_CMD_MODE 0x00000080U
-
-#define EMC_DYN_CTRL_CMD_PALL 0x00000100U
-
-#define EMC_DYN_CTRL_CMD_NOP 0x00000180U
-
-typedef struct {
-  uint32_t cfg;
-  uint32_t waitwen;
-  uint32_t waitoen;
-  uint32_t waitrd;
-  uint32_t waitpage;
-  uint32_t waitwr;
-  uint32_t waitrun;
-} lpc24xx_emc_static;
-
 /* I2C */
 
 typedef struct {

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/misc/dma.c:1.7 rtems/c/src/lib/libbsp/arm/lpc24xx/misc/dma.c:1.8
--- rtems/c/src/lib/libbsp/arm/lpc24xx/misc/dma.c:1.7	Thu May 20 09:23:13 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/misc/dma.c	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2008, 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -38,19 +39,21 @@
   /* Disable module */
   GPDMA_CONFIG = 0;
 
-  /* Enable module */
-  #if BYTE_ORDER == LITTLE_ENDIAN
-    GPDMA_CONFIG = GPDMA_CONFIG_EN;
-  #else
-    GPDMA_CONFIG = GPDMA_CONFIG_EN | GPDMA_CONFIG_MODE;
-  #endif
-
   /* Reset registers */
   GPDMA_SOFT_SREQ = 0;
   GPDMA_SOFT_BREQ = 0;
   GPDMA_SOFT_LSREQ = 0;
   GPDMA_SOFT_LBREQ = 0;
   GPDMA_SYNC = 0;
+  GPDMA_CH0_CFG = 0;
+  GPDMA_CH1_CFG = 0;
+
+  /* Enable module */
+  #if BYTE_ORDER == LITTLE_ENDIAN
+    GPDMA_CONFIG = GPDMA_CONFIG_EN;
+  #else
+    GPDMA_CONFIG = GPDMA_CONFIG_EN | GPDMA_CONFIG_MODE;
+  #endif
 }
 
 rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel)

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/misc/io.c:1.8 rtems/c/src/lib/libbsp/arm/lpc24xx/misc/io.c:1.9
--- rtems/c/src/lib/libbsp/arm/lpc24xx/misc/io.c:1.8	Fri Dec  3 03:56:48 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/misc/io.c	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2009, 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -22,193 +23,11 @@
 #include <bsp/io.h>
 #include <bsp/system-clocks.h>
 
-#define LPC24XX_IO_SELECT(pin) (pin >> 4U)
-
-#define LPC24XX_IO_SELECT_SHIFT(pin) ((pin & 0xfU) << 1U)
-
-#define LPC24XX_IO_SELECT_MASK 0x3U
-
-#define LPC24XX_IO_PRIMARY 0x0U
-
-#define LPC24XX_IO_ALTERNATE_0 0x1U
-
-#define LPC24XX_IO_ALTERNATE_1 0x2U
-
-#define LPC24XX_IO_ALTERNATE_2 0x3U
-
-#define LPC24XX_IO_ENTRY(mod, cfg, begin_port, begin_index, last_port, last_index, function) \
-  { \
-    .module = mod, \
-    .config = cfg, \
-    .pin_begin = LPC24XX_IO_INDEX_BY_PORT(begin_port, begin_index), \
-    .pin_last = LPC24XX_IO_INDEX_BY_PORT(last_port, last_index), \
-    .pin_function = function \
-  }
-
-typedef struct {
-  unsigned module : 6;
-  unsigned config : 4;
-  unsigned pin_begin : 8;
-  unsigned pin_last : 8;
-  unsigned pin_function : 3;
-} lpc24xx_io_entry;
-
-typedef void (*lpc24xx_io_iterate_routine)(unsigned pin, unsigned function);
-
-static const lpc24xx_io_entry lpc24xx_io_config_table [] = {
-  /* UART */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_0, 0, 0, 2, 0, 3, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 0, 0, 15, 0, 16, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 1, 2, 0, 2, 1, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_1, 2, 3, 16, 3, 17, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 0, 0, 10, 0, 11, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 1, 2, 8, 2, 9, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_2, 2, 4, 22, 4, 23, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 0, 0, 0, 0, 1, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 1, 0, 25, 0, 26, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_UART_3, 2, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_2),
-
-  /* Ethernet */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 0, 1, 0, 1, 17, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 0, 1, 1, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 4, 1, 4, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 8, 1, 10, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 1, 14, 1, 17, LPC24XX_IO_ALTERNATE_0),
-
-  /* ADC */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 0, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 2, 0, 26, 0, 26, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 2, 1, 30, 1, 31, LPC24XX_IO_ALTERNATE_2),
-
-  /* I2C */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_0, 0, 0, 27, 0, 28, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 0, 0, 0, 0, 1, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 1, 0, 19, 0, 20, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_1, 2, 2, 14, 2, 15, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 0, 0, 10, 0, 11, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 1, 2, 30, 2, 31, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2C_2, 2, 4, 20, 4, 21, LPC24XX_IO_ALTERNATE_1),
-
-  /* I2S */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 0, 0, 4, 0, 9, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_I2S, 1, 2, 11, 2, 13, LPC24XX_IO_ALTERNATE_2),
-
-  /* SSP */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 20, 0, 21, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 23, 0, 24, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 2, 2, 22, 2, 23, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_0, 2, 2, 26, 2, 27, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 0, 0, 6, 0, 9, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 0, 14, 0, 14, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 1, 1, 31, 1, 31, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SSP_1, 2, 4, 20, 4, 23, LPC24XX_IO_ALTERNATE_2),
-
-  /* USB */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 0, 29, 0, 30, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 1, 19, 1, 19, LPC24XX_IO_ALTERNATE_1),
-
-  /* SPI */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SPI, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_2),
-
-  /* PWM */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_PWM_1, 0, 2, 0, 2, 0, LPC24XX_IO_ALTERNATE_0),
-
-  /* LCD */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 0, 4, 0, 9, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 1, 20, 1, 29, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 0, 2, 3, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 5, 2, 9, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 2, 12, 2, 13, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 0, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_1),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 1, 20, 1, 29, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 0, 2, 3, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 5, 2, 9, LPC24XX_IO_ALTERNATE_2),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 2, 12, 2, 13, LPC24XX_IO_ALTERNATE_0),
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_LCD, 1, 4, 28, 4, 29, LPC24XX_IO_ALTERNATE_1),
-
-  /* DAC */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_DAC, 0, 0, 26, 0, 26, LPC24XX_IO_ALTERNATE_1),
-
-  /* Terminate */
-  LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0)
-};
-
-static rtems_status_code lpc24xx_io_iterate(
-  lpc24xx_module module,
-  unsigned config,
-  lpc24xx_io_iterate_routine routine
-)
-{
-  rtems_status_code sc = RTEMS_SUCCESSFUL;
-  const lpc24xx_io_entry *e = &lpc24xx_io_config_table [0];
-
-  while (e->module != LPC24XX_MODULE_COUNT) {
-    if (e->module == module && e->config == config) {
-      unsigned pin = e->pin_begin;
-      unsigned last = e->pin_last;
-      unsigned function = e->pin_function;
-
-      while (pin <= last) {
-        (*routine)(pin, function);
-
-        ++pin;
-      }
-
-      sc = RTEMS_SUCCESSFUL;
-    }
-    ++e;
-  }
-
-  return sc;
-}
-
-static void lpc24xx_io_do_config(unsigned pin, unsigned function)
-{
-  rtems_interrupt_level level;
-  unsigned select = LPC24XX_IO_SELECT(pin);
-  unsigned shift = LPC24XX_IO_SELECT_SHIFT(pin);
-  unsigned mask = LPC24XX_IO_SELECT_MASK << shift;
-  unsigned pinsel = 0;
+#define LPC24XX_PIN_SELECT(pin) (pin >> 4U)
 
-  rtems_interrupt_disable(level);
-  pinsel = LPC24XX_PINSEL [select];
-  pinsel &= ~mask;
-  pinsel |= (function & LPC24XX_IO_SELECT_MASK) << shift;
-  LPC24XX_PINSEL [select] = pinsel;
-  rtems_interrupt_enable(level);
-}
-
-static void lpc24xx_io_do_release(unsigned pin, unsigned function)
-{
-  rtems_interrupt_level level;
-  unsigned select = LPC24XX_IO_SELECT(pin);
-  unsigned shift = LPC24XX_IO_SELECT_SHIFT(pin);
-  unsigned mask = LPC24XX_IO_SELECT_MASK << shift;
+#define LPC24XX_PIN_SELECT_SHIFT(pin) ((pin & 0xfU) << 1U)
 
-  rtems_interrupt_disable(level);
-  LPC24XX_PINSEL [select] &= ~mask;
-  rtems_interrupt_enable(level);
-}
-
-rtems_status_code lpc24xx_io_config(
-  lpc24xx_module module,
-  unsigned config
-)
-{
-  return lpc24xx_io_iterate(module, config, lpc24xx_io_do_config);
-}
-
-rtems_status_code lpc24xx_io_release(
-  lpc24xx_module module,
-  unsigned config
-)
-{
-  return lpc24xx_io_iterate(module, config, lpc24xx_io_do_release);
-}
+#define LPC24XX_PIN_SELECT_MASK 0x3U
 
 rtems_status_code lpc24xx_gpio_config(
   unsigned pin,
@@ -219,8 +38,8 @@
     rtems_interrupt_level level;
     unsigned port = LPC24XX_IO_PORT(pin);
     unsigned bit = LPC24XX_IO_PORT_BIT(pin);
-    unsigned select = LPC24XX_IO_SELECT(pin);
-    unsigned shift = LPC24XX_IO_SELECT_SHIFT(pin);
+    unsigned select = LPC24XX_PIN_SELECT(pin);
+    unsigned shift = LPC24XX_PIN_SELECT_SHIFT(pin);
     unsigned resistor = settings & LPC24XX_GPIO_RESISTOR_MASK;
     unsigned output = (settings & LPC24XX_GPIO_OUTPUT) != 0 ? 1U : 0U;
 
@@ -244,8 +63,8 @@
 
     /* Resistor */
     LPC24XX_PINMODE [select] =
-      (LPC24XX_PINMODE [select] & ~(LPC24XX_IO_SELECT_MASK << shift))
-        | ((resistor & LPC24XX_IO_SELECT_MASK) << shift);
+      (LPC24XX_PINMODE [select] & ~(LPC24XX_PIN_SELECT_MASK << shift))
+        | ((resistor & LPC24XX_PIN_SELECT_MASK) << shift);
 
     rtems_interrupt_flash(level);
 
@@ -392,3 +211,124 @@
 {
   return lpc24xx_module_do_enable(module, 0U, false);
 }
+
+typedef rtems_status_code (*lpc24xx_pin_visitor)(
+  volatile uint32_t *pinsel,
+  uint32_t pinsel_mask,
+  uint32_t pinsel_value,
+  volatile uint32_t *fio_dir,
+  uint32_t fio_bit
+);
+
+static rtems_status_code lpc24xx_pin_set_function(
+  volatile uint32_t *pinsel,
+  uint32_t pinsel_mask,
+  uint32_t pinsel_value,
+  volatile uint32_t *fio_dir,
+  uint32_t fio_bit
+)
+{
+  rtems_interrupt_level level;
+
+  rtems_interrupt_disable(level);
+  *pinsel = (*pinsel & ~pinsel_mask) | pinsel_value;
+  rtems_interrupt_enable(level);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+static rtems_status_code lpc24xx_pin_check_function(
+  volatile uint32_t *pinsel,
+  uint32_t pinsel_mask,
+  uint32_t pinsel_value,
+  volatile uint32_t *fio_dir,
+  uint32_t fio_bit
+)
+{
+  if ((*pinsel & pinsel_mask) == pinsel_value) {
+    return RTEMS_SUCCESSFUL;
+  } else {
+    return RTEMS_IO_ERROR;
+  }
+}
+
+static rtems_status_code lpc24xx_pin_set_input(
+  volatile uint32_t *pinsel,
+  uint32_t pinsel_mask,
+  uint32_t pinsel_value,
+  volatile uint32_t *fio_dir,
+  uint32_t fio_bit
+)
+{
+  rtems_interrupt_level level;
+
+  rtems_interrupt_disable(level);
+  *fio_dir &= ~fio_bit;
+  *pinsel &= ~pinsel_mask;
+  rtems_interrupt_enable(level);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+static rtems_status_code lpc24xx_pin_check_input(
+  volatile uint32_t *pinsel,
+  uint32_t pinsel_mask,
+  uint32_t pinsel_value,
+  volatile uint32_t *fio_dir,
+  uint32_t fio_bit
+)
+{
+  if ((*pinsel & pinsel_mask) == 0 && (*fio_dir & fio_bit) == 0) {
+    return RTEMS_SUCCESSFUL;
+  } else {
+    return RTEMS_IO_ERROR;
+  }
+}
+
+static const lpc24xx_pin_visitor lpc24xx_pin_visitors [] = {
+  [LPC24XX_PIN_SET_FUNCTION] = lpc24xx_pin_set_function,
+  [LPC24XX_PIN_CHECK_FUNCTION] = lpc24xx_pin_check_function,
+  [LPC24XX_PIN_SET_INPUT] = lpc24xx_pin_set_input,
+  [LPC24XX_PIN_CHECK_INPUT] = lpc24xx_pin_check_input
+};
+
+rtems_status_code lpc24xx_pin_config(
+  const lpc24xx_pin_range *pins,
+  lpc24xx_pin_action action
+)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  if ((unsigned) action <= LPC24XX_PIN_CHECK_INPUT) {
+    lpc24xx_pin_visitor visitor = lpc24xx_pin_visitors [action];
+    lpc24xx_pin_range terminal = LPC24XX_PIN_TERMINAL;
+
+    while (sc == RTEMS_SUCCESSFUL && pins->value != terminal.value) {
+      uint32_t port = pins->fields.port;
+      uint32_t index = pins->fields.index_begin;
+      uint32_t last = pins->fields.index_last;
+      uint32_t function = pins->fields.function;
+      volatile uint32_t *fio_dir = &LPC24XX_FIO [port].dir;
+
+      while (sc == RTEMS_SUCCESSFUL && index <= last) {
+        uint32_t pin = LPC24XX_IO_INDEX_BY_PORT(port, index);
+        uint32_t select = LPC24XX_PIN_SELECT(pin);
+        uint32_t shift = LPC24XX_PIN_SELECT_SHIFT(pin);
+        volatile uint32_t *pinsel = &LPC24XX_PINSEL [select];
+        uint32_t pinsel_mask = LPC24XX_PIN_SELECT_MASK << shift;
+        uint32_t pinsel_value = (function & LPC24XX_PIN_SELECT_MASK) << shift;
+        uint32_t fio_bit = 1U << index;
+
+        sc = (*visitor)(pinsel, pinsel_mask, pinsel_value, fio_dir, fio_bit);
+
+        ++index;
+      }
+
+      ++pins;
+    }
+  } else {
+    sc = RTEMS_NOT_DEFINED;
+  }
+
+  return sc;
+}

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c:1.1 rtems/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c:1.2
--- rtems/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c:1.1	Fri Dec  3 03:56:48 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c	Thu May 19 07:30:00 2011
@@ -23,14 +23,16 @@
 #include <assert.h>
 
 #include <bsp/lpc24xx.h>
-#include <bsp/io.h>
 #include <bsp/lcd.h>
 #include <bsp/utility.h>
 #include <bsp/system-clocks.h>
 
 #define LCD_ENABLE BSP_BIT32(0)
 
-rtems_status_code lpc24xx_lcd_set_mode(lpc24xx_lcd_mode mode, unsigned pin_config)
+rtems_status_code lpc24xx_lcd_set_mode(
+  lpc24xx_lcd_mode mode,
+  const lpc24xx_pin_range *pins
+)
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
   bool enable = false;
@@ -61,7 +63,7 @@
 
       PINSEL11 = BSP_FLD32(mode, 1, 3) | LCD_ENABLE;
 
-      sc = lpc24xx_io_config(LPC24XX_MODULE_LCD, pin_config);
+      sc = lpc24xx_pin_config(pins, LPC24XX_PIN_SET_FUNCTION);
       assert(sc == RTEMS_SUCCESSFUL);
     } else {
       if (lpc24xx_lcd_current_mode() != LCD_MODE_DISABLED) {
@@ -78,7 +80,7 @@
         LCD_CTRL = lcd_ctrl;
       }
 
-      sc = lpc24xx_io_release(LPC24XX_MODULE_LCD, pin_config);
+      sc = lpc24xx_pin_config(pins, LPC24XX_PIN_SET_INPUT);
       assert(sc == RTEMS_SUCCESSFUL);
 
       PINSEL11 = 0;

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/preinstall.am:1.20 rtems/c/src/lib/libbsp/arm/lpc24xx/preinstall.am:1.21
--- rtems/c/src/lib/libbsp/arm/lpc24xx/preinstall.am:1.20	Fri Dec  3 03:56:47 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/preinstall.am	Thu May 19 07:30:00 2011
@@ -94,6 +94,18 @@
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-i2s.h
 
+$(PROJECT_INCLUDE)/bsp/lpc-emc.h: ../shared/lpc/include/lpc-emc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-emc.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-emc.h
+
+$(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h
+
+$(PROJECT_INCLUDE)/bsp/lpc-lcd.h: ../shared/lpc/include/lpc-lcd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-lcd.h
+
 $(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c:1.9 rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c:1.10
--- rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c:1.9	Thu May 20 08:10:56 2010
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2008, 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -61,6 +62,21 @@
   #endif
 }
 
+static void initialize_console(void)
+{
+  #ifdef LPC24XX_CONFIG_CONSOLE
+    static const lpc24xx_pin_range pins [] = {
+      LPC24XX_PIN_UART_0_TXD,
+      LPC24XX_PIN_UART_0_RXD,
+      LPC24XX_PIN_TERMINAL
+    };
+
+    lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK);
+    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+    BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD);
+  #endif
+}
+
 void bsp_start(void)
 {
   /* Initialize Timer 1 */
@@ -69,12 +85,7 @@
   /* Initialize standard timer */
   lpc24xx_timer_initialize();
 
-  /* Initialize console */
-  #ifdef LPC24XX_CONFIG_CONSOLE
-    lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK);
-    lpc24xx_io_config(LPC24XX_MODULE_UART_0, LPC24XX_CONFIG_CONSOLE);
-    BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD);
-  #endif
+  initialize_console();
 
   /* Interrupts */
   if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
@@ -91,18 +102,4 @@
       (uintptr_t) bsp_section_stack_size
     );
   #endif
-
-  /* UART configurations */
-  #ifdef LPC24XX_CONFIG_UART_1
-    lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_CCLK);
-    lpc24xx_io_config(LPC24XX_MODULE_UART_1, LPC24XX_CONFIG_UART_1);
-  #endif
-  #ifdef LPC24XX_CONFIG_UART_2
-    lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_CCLK);
-    lpc24xx_io_config(LPC24XX_MODULE_UART_2, LPC24XX_CONFIG_UART_2);
-  #endif
-  #ifdef LPC24XX_CONFIG_UART_3
-    lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_CCLK);
-    lpc24xx_io_config(LPC24XX_MODULE_UART_3, LPC24XX_CONFIG_UART_3);
-  #endif
 }

diff -u rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c:1.8 rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c:1.9
--- rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c:1.8	Fri Feb 11 05:48:16 2011
+++ rtems/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c	Thu May 19 07:30:00 2011
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2008, 2009
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems at embedded-brains.de>
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -23,13 +24,48 @@
 
 #include <bspopts.h>
 #include <bsp/start.h>
-#include <bsp/lpc24xx.h>
 #include <bsp/linker-symbols.h>
+#include <bsp/lpc24xx.h>
+#include <bsp/lpc-emc.h>
 
 #if defined(LPC24XX_EMC_MICRON) || defined(LPC24XX_EMC_NUMONYX)
   #define LPC24XX_EMC_INIT
 #endif
 
+static volatile lpc_emc *const emc = (lpc_emc *) EMC_BASE_ADDR;
+
+typedef struct {
+  uint32_t refresh;
+  uint32_t readconfig;
+  uint32_t trp;
+  uint32_t tras;
+  uint32_t tsrex;
+  uint32_t tapr;
+  uint32_t tdal;
+  uint32_t twr;
+  uint32_t trc;
+  uint32_t trfc;
+  uint32_t txsr;
+  uint32_t trrd;
+  uint32_t tmrd;
+} lpc24xx_emc_dynamic_config;
+
+typedef struct {
+  uint32_t config;
+  uint32_t rascas;
+  uint32_t mode;
+} lpc24xx_emc_dynamic_chip_config;
+
+typedef struct {
+  uint32_t config;
+  uint32_t waitwen;
+  uint32_t waitoen;
+  uint32_t waitrd;
+  uint32_t waitpage;
+  uint32_t waitwr;
+  uint32_t waitrun;
+} lpc24xx_emc_static_chip_config;
+
 #ifdef LPC24XX_EMC_MICRON
   static void BSP_START_TEXT_SECTION lpc24xx_ram_test_32(void)
   {
@@ -55,9 +91,7 @@
     #endif
   }
 
-  static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(
-    unsigned ticks
-  )
+  static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(unsigned ticks)
   {
     unsigned i = 0;
 
@@ -68,173 +102,206 @@
       __asm__ volatile ("nop");
     }
   }
+
+  static void BSP_START_TEXT_SECTION lpc24xx_udelay(unsigned us)
+  {
+    lpc24xx_cpu_delay(us * (LPC24XX_CCLK / 1000000));
+  }
 #endif
 
-/**
- * @brief EMC initialization hook 0.
- */
-static void BSP_START_TEXT_SECTION lpc24xx_init_emc_0(void)
+static void BSP_START_TEXT_SECTION lpc24xx_init_emc_pinsel(void)
+{
+  #ifdef LPC24XX_EMC_INIT
+    static const BSP_START_DATA_SECTION uint32_t pinsel_5_9 [5] = {
+      0x05010115,
+      0x55555555,
+      0x0,
+      0x55555555,
+      0x40050155
+    };
+
+    bsp_start_memcpy(
+      (int *) &PINSEL5,
+      (const int *) &pinsel_5_9,
+      sizeof(pinsel_5_9)
+    );
+  #endif
+}
+
+static void BSP_START_TEXT_SECTION lpc24xx_init_emc_static(void)
 {
   #ifdef LPC24XX_EMC_NUMONYX
     /*
      * Static Memory 1: Numonyx M29W160EB
      *
      * 1 clock cycle = 1/72MHz = 13.9ns
-     *
-     * We cannot use an initializer since this will result in the usage of the
-     * read-only data section which is not available here.
-     */
-    lpc24xx_emc_static numonyx;
-
-    /*
-     * 16 bit, page mode disabled, active LOW chip select, extended wait
-     * disabled, writes not protected, byte lane state LOW/LOW (!).
      */
-    numonyx.cfg = 0x81;
-
-    /* 1 clock cycles delay from the chip select 1 to the write enable */
-    numonyx.waitwen = 0;
+    static const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config chip_config = {
+      /*
+       * 16 bit, page mode disabled, active LOW chip select, extended wait
+       * disabled, writes not protected, byte lane state LOW/LOW (!).
+       */
+      .config = 0x81,
 
-    /*
-     * 0 clock cycles delay from the chip select 1 or address change
-     * (whichever is later) to the output enable
-     */
-    numonyx.waitoen = 0;
+      /* 1 clock cycles delay from the chip select 1 to the write enable */
+      .waitwen = 0,
 
-    /* 7 clock cycles delay from the chip select 1 to the read access */
-    numonyx.waitrd = 0x6;
+      /*
+       * 0 clock cycles delay from the chip select 1 or address change
+       * (whichever is later) to the output enable
+       */
+      .waitoen = 0,
 
-    /*
-     * 32 clock cycles delay for asynchronous page mode sequential accesses
-     */
-    numonyx.waitpage = 0x1f;
+      /* 7 clock cycles delay from the chip select 1 to the read access */
+      .waitrd = 0x6,
 
-    /* 5 clock cycles delay from the chip select 1 to the write access */
-    numonyx.waitwr = 0x3;
+      /*
+       * 32 clock cycles delay for asynchronous page mode sequential accesses
+       */
+      .waitpage = 0x1f,
 
-    /* 16 bus turnaround cycles */
-    numonyx.waitrun = 0xf;
-  #endif
+      /* 5 clock cycles delay from the chip select 1 to the write access */
+      .waitwr = 0x3,
 
-  #ifdef LPC24XX_EMC_INIT
-    /* Set pin functions for EMC */
-    PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555;
-    PINSEL6 = 0x55555555;
-    PINSEL8 = 0x55555555;
-    PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555;
-  #endif
+      /* 16 bus turnaround cycles */
+      .waitrun = 0xf
+    };
+    lpc24xx_emc_static_chip_config chip_config_on_stack;
 
-  #ifdef LPC24XX_EMC_NUMONYX
-    /* Static Memory 1 settings */
+    bsp_start_memcpy(
+      (int *) &chip_config_on_stack,
+      (const int *) &chip_config,
+      sizeof(chip_config_on_stack)
+    );
     bsp_start_memcpy(
       (int *) EMC_STA_BASE_1,
-      (const int *) &numonyx,
-      sizeof(numonyx)
+      (const int *) &chip_config_on_stack,
+      sizeof(chip_config_on_stack)
     );
   #endif
 }
 
-/**
- * @brief EMC initialization hook 1.
- */
-static void BSP_START_TEXT_SECTION lpc24xx_init_emc_1(void)
+static void BSP_START_TEXT_SECTION lpc24xx_init_emc_memory_map(void)
 {
   #ifdef LPC24XX_EMC_INIT
     /* Use normal memory map */
     EMC_CTRL &= ~0x2U;
   #endif
+}
 
+static void BSP_START_TEXT_SECTION lpc24xx_init_emc_dynamic(void)
+{
   #ifdef LPC24XX_EMC_MICRON
-    /* Check if we need to initialize it */
-    if ((EMC_DYN_CFG0 & 0x00080000) == 0) {
-      /*
-       * The buffer enable bit is not set.  Now we assume that the controller
-       * is not properly initialized.
-       */
+    /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */
 
-      /* Global dynamic settings */
-
-      /* FIXME */
-      EMC_DYN_APR = 2;
+    static const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config dynamic_config = {
+      /* Auto-refresh command every 15.6 us */
+      .refresh = 0x46,
 
-      /* Data-in to active command period tWR + tRP */
-      EMC_DYN_DAL = 4;
+      /* Use command delayed strategy */
+      .readconfig = 1,
 
-      /* Load mode register to active or refresh command period 2 tCK */
-      EMC_DYN_MRD = 1;
+      /* Precharge command period 20 ns */
+      .trp = 1,
 
       /* Active to precharge command period 44 ns */
-      EMC_DYN_RAS = 3;
+      .tras = 3,
 
-      /* Active to active command period 66 ns */
-      EMC_DYN_RC = 4;
-
-      /* Use command delayed strategy */
-      EMC_DYN_RD_CFG = 1;
+      /* FIXME */
+      .tsrex = 5,
 
-      /* Auto refresh period 66 ns */
-      EMC_DYN_RFC = 4;
+      /* FIXME */
+      .tapr = 2,
 
-      /* Precharge command period 20 ns */
-      EMC_DYN_RP = 1;
+      /* Data-in to active command period tWR + tRP */
+      .tdal = 4,
 
-      /* Active bank a to active bank b command period 15 ns */
-      EMC_DYN_RRD = 1;
+      /* Write recovery time 15 ns */
+      .twr = 1,
 
-      /* FIXME */
-      EMC_DYN_SREX = 5;
+      /* Active to active command period 66 ns */
+      .trc = 4,
 
-      /* Write recovery time 15 ns */
-      EMC_DYN_WR = 1;
+      /* Auto refresh period 66 ns */
+      .trfc = 4,
 
       /* Exit self refresh to active command period 75 ns */
-      EMC_DYN_XSR = 5;
+      .txsr = 5,
 
-      /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */
+      /* Active bank a to active bank b command period 15 ns */
+      .trrd = 1,
 
+      /* Load mode register to active or refresh command period 2 tCK */
+      .tmrd = 1,
+    };
+    static const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config chip_config = {
       /*
        * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected writes
        */
-      EMC_DYN_CFG0 = 0x0280;
+      .config = 0x280,
 
-      /* CAS and RAS latency */
-      EMC_DYN_RASCAS0 = 0x0202;
+      .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0),
+      .mode = 0xa0000000 | (0x23 << (1 + 2 + 8))
+    };
 
-      /* Wait 50 micro seconds */
-      lpc24xx_cpu_delay(3600);
+    volatile lpc_emc_dynamic *chip = &emc->dynamic [0];
+    uint32_t dynamiccontrol = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS;
 
-      /* Send command: NOP */
-      EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_NOP;
-
-      /* Wait 50 micro seconds */
-      lpc24xx_cpu_delay(3600);
+    /* Check if we need to initialize it */
+    if ((chip->config & EMC_DYN_CFG_B) == 0) {
+      /*
+       * The buffer enable bit is not set.  Now we assume that the controller
+       * is not properly initialized.
+       */
 
-      /* Send command: PRECHARGE ALL */
-      EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_PALL;
+      /* Global dynamic settings */
+      emc->dynamicreadconfig = dynamic_config.readconfig;
+      emc->dynamictrp = dynamic_config.trp;
+      emc->dynamictras = dynamic_config.tras;
+      emc->dynamictsrex = dynamic_config.tsrex;
+      emc->dynamictapr = dynamic_config.tapr;
+      emc->dynamictdal = dynamic_config.tdal;
+      emc->dynamictwr = dynamic_config.twr;
+      emc->dynamictrc = dynamic_config.trc;
+      emc->dynamictrfc = dynamic_config.trfc;
+      emc->dynamictxsr = dynamic_config.txsr;
+      emc->dynamictrrd = dynamic_config.trrd;
+      emc->dynamictmrd = dynamic_config.tmrd;
+
+      /* Wait 100us after the power is applied and the clocks have stabilized */
+      lpc24xx_udelay(100);
+
+      /* NOP period, disable self-refresh */
+      emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_NOP;
+      lpc24xx_udelay(200);
 
-      /* Shortest possible refresh period */
-      EMC_DYN_RFSH = 0x01;
+      /* Precharge all */
+      emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_PALL;
 
-      /* Wait at least 128 AHB clock cycles */
+      /*
+       * Perform several refresh cycles with a memory refresh every 16 AHB
+       * clock cycles.  Wait until eight SDRAM refresh cycles have occurred
+       * (128 AHB clock cycles).
+       */
+      emc->dynamicrefresh = 1;
       lpc24xx_cpu_delay(128);
 
-      /* Wait 1 micro second */
-      lpc24xx_cpu_delay(72);
-
       /* Set refresh period */
-      EMC_DYN_RFSH = 0x46;
+      emc->dynamicrefresh = dynamic_config.refresh;
 
-      /* Send command: MODE */
-      EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_MODE;
+      /* Operational values for the chip */
+      chip->rascas = chip_config.rascas;
+      chip->config = chip_config.config;
+
+      /* Mode */
+      emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
+      *((volatile uint32_t *) chip_config.mode);
 
-      /* Set mode register in SDRAM */
-      *((volatile uint32_t *) (0xa0000000 | (0x23 << (1 + 2 + 8))));
-
-      /* Send command: NORMAL */
-      EMC_DYN_CTRL = 0;
+      /* Normal operation */
+      emc->dynamiccontrol = 0;
 
       /* Enable buffer */
-      EMC_DYN_CFG0 |= 0x00080000;
+      chip->config |= EMC_DYN_CFG_B;
 
       /* Test RAM */
       lpc24xx_ram_test_32();
@@ -355,11 +422,9 @@
 
 void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
 {
-  /* Initialize PLL */
   lpc24xx_init_pll();
-
-  /* Initialize EMC hook 0 */
-  lpc24xx_init_emc_0();
+  lpc24xx_init_emc_pinsel();
+  lpc24xx_init_emc_static();
 }
 
 void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
@@ -395,8 +460,8 @@
   FIO3CLR = 0xffffffff;
   FIO4CLR = 0xffffffff;
 
-  /* Initialize EMC hook 1 */
-  lpc24xx_init_emc_1();
+  lpc24xx_init_emc_memory_map();
+  lpc24xx_init_emc_dynamic();
 
   #ifdef LPC24XX_STOP_GPDMA
     if ((PCONP & PCONP_GPDMA) != 0) {



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