[rtems commit] bsp/mpc55xxevb: Change early MMU settings
Sebastian Huber
sebh at rtems.org
Tue Apr 24 12:32:28 UTC 2012
Module: rtems
Branch: master
Commit: 13a8b19eedb5b9cc931c88b6a5fe29a49c2853db
Changeset: http://git.rtems.org/rtems/commit/?id=13a8b19eedb5b9cc931c88b6a5fe29a49c2853db
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Tue Apr 24 11:21:46 2012 +0200
bsp/mpc55xxevb: Change early MMU settings
Add internal SRAM sections with cache enabled to early MMU settings.
The internal SRAM initialization will use the early MMU settings. This
allows applications to use cache inhibited areas in the internal SRAM.
---
.../mpc55xxevb/startup/start-config-mmu-early.c | 19 ++++++++++++---
.../powerpc/mpc55xxevb/startup/start-config-mmu.c | 24 ++++++++++----------
.../powerpc/mpc55xxevb/startup/start-early.c | 2 +-
3 files changed, 28 insertions(+), 17 deletions(-)
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu-early.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu-early.c
index d243bee..406b33b 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu-early.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu-early.c
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -25,14 +25,25 @@
BSP_START_TEXT_SECTION const struct MMU_tag
mpc55xx_start_config_mmu_early [] = {
-#if MPC55XX_CHIP_TYPE / 10 == 564
+#if MPC55XX_CHIP_TYPE / 10 == 555
+ /* Internal SRAM 96k */
+ MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_256K, 1, 1, 1, 0),
+#elif MPC55XX_CHIP_TYPE / 10 == 556
+ /* Internal SRAM 128k */
+ MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_64K, 1, 1, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(5, 0x40010000, MPC55XX_MMU_64K, 0, 1, 1, 0),
+#elif MPC55XX_CHIP_TYPE / 10 == 564
/* Internal flash 1M */
MPC55XX_MMU_TAG_INITIALIZER(0, 0x00000000, MPC55XX_MMU_1M, 1, 0, 1, 1),
/* IO */
MPC55XX_MMU_TAG_INITIALIZER(1, 0xffe00000, MPC55XX_MMU_2M, 0, 1, 1, 1),
MPC55XX_MMU_TAG_INITIALIZER(2, 0xc3f00000, MPC55XX_MMU_1M, 0, 1, 1, 1),
- /* Internal SRAM 64k */
- MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_64K, 1, 1, 1, 1)
+ /* Internal SRAM 64k + 64k */
+ MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_64K, 1, 1, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(4, 0x50000000, MPC55XX_MMU_64K, 0, 1, 1, 0)
+#elif MPC55XX_CHIP_TYPE / 10 == 567
+ /* Internal SRAM 256k */
+ MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_256K, 1, 1, 1, 0)
#endif
};
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
index d5df9ff..dd79366 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -86,20 +86,20 @@ BSP_START_TEXT_SECTION const struct MMU_tag
#elif defined(MPC55XX_BOARD_MPC5566EVB)
/* Internal flash 3M */
MPC55XX_MMU_TAG_INITIALIZER(1, 0x00000000, MPC55XX_MMU_64K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(5, 0x00010000, MPC55XX_MMU_64K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(6, 0x00020000, MPC55XX_MMU_64K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(7, 0x00030000, MPC55XX_MMU_64K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(8, 0x00040000, MPC55XX_MMU_256K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(9, 0x00080000, MPC55XX_MMU_256K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(10, 0x000c0000, MPC55XX_MMU_256K, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(11, 0x00100000, MPC55XX_MMU_1M, 1, 0, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(12, 0x00200000, MPC55XX_MMU_1M, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(6, 0x00010000, MPC55XX_MMU_64K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(7, 0x00020000, MPC55XX_MMU_64K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(8, 0x00030000, MPC55XX_MMU_64K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(9, 0x00040000, MPC55XX_MMU_256K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(10, 0x00080000, MPC55XX_MMU_256K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(11, 0x000c0000, MPC55XX_MMU_256K, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(12, 0x00100000, MPC55XX_MMU_1M, 1, 0, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(13, 0x00200000, MPC55XX_MMU_1M, 1, 0, 1, 0),
/* External SRAM 512k */
MPC55XX_MMU_TAG_INITIALIZER(2, 0x20000000, MPC55XX_MMU_256K, 0, 1, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(13, 0x20040000, MPC55XX_MMU_256K, 0, 1, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(14, 0x20040000, MPC55XX_MMU_256K, 0, 1, 1, 0),
/* Internal SRAM 128k */
- MPC55XX_MMU_TAG_INITIALIZER(3, 0x40010000, MPC55XX_MMU_64K, 0, 1, 1, 0),
- MPC55XX_MMU_TAG_INITIALIZER(14, 0x40000000, MPC55XX_MMU_64K, 0, 1, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_64K, 0, 1, 1, 0),
+ MPC55XX_MMU_TAG_INITIALIZER(5, 0x40010000, MPC55XX_MMU_64K, 0, 1, 1, 0),
/* External Ethernet Controller 64k */
MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000, MPC55XX_MMU_64K, 0, 1, 1, 1)
#elif defined(MPC55XX_BOARD_MPC5674FEVB)
diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-early.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-early.c
index 4d0c35d..62cf8f5 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-early.c
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-early.c
@@ -166,8 +166,8 @@ BSP_START_TEXT_SECTION void mpc55xx_start_early(void)
#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED)
mpc55xx_start_cache();
#endif
- mpc55xx_start_mmu();
mpc55xx_start_internal_ram();
+ mpc55xx_start_mmu();
mpc55xx_start_mode_change();
mpc55xx_start_siu();
mpc55xx_start_ebi_chip_select();
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