[rtems commit] arm: Fix CPU_MODES_INTERRUPT_MASK
Sebastian Huber
sebh at rtems.org
Mon Aug 5 11:40:51 UTC 2013
Module: rtems
Branch: master
Commit: 007bdc4f5953ddd36f166a2d4e69352d778384ed
Changeset: http://git.rtems.org/rtems/commit/?id=007bdc4f5953ddd36f166a2d4e69352d778384ed
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Mon Aug 5 10:16:31 2013 +0200
arm: Fix CPU_MODES_INTERRUPT_MASK
The set of interrupt levels must be a continuous range of non-negative
integers starting at zero.
---
cpukit/score/cpu/arm/cpu.c | 8 +++++---
cpukit/score/cpu/arm/rtems/score/cpu.h | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 958bd81..7002136 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -87,10 +87,12 @@ void _CPU_ISR_Set_level( uint32_t level )
{
uint32_t arm_switch_reg;
+ level = ( level != 0 ) ? ARM_PSR_I : 0;
+
__asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[arm_switch_reg], cpsr\n"
- "bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
+ "bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n"
"orr %[arm_switch_reg], %[level]\n"
"msr cpsr, %0\n"
ARM_SWITCH_BACK
@@ -107,12 +109,12 @@ uint32_t _CPU_ISR_Get_level( void )
__asm__ volatile (
ARM_SWITCH_TO_ARM
"mrs %[level], cpsr\n"
- "and %[level], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n"
+ "and %[level], #" _CPU_ISR_LEVEL_STRINGOF( ARM_PSR_I ) "\n"
ARM_SWITCH_BACK
: [level] "=&r" (level) ARM_SWITCH_ADDITIONAL_OUTPUT
);
- return level;
+ return ( level & ARM_PSR_I ) != 0;
}
void _CPU_ISR_install_vector(
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 602783e..a8e9493 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -165,7 +165,7 @@
* operating system support for a FIQ, she can trigger a software interrupt and
* service the request in a two-step process.
*/
-#define CPU_MODES_INTERRUPT_MASK 0x80
+#define CPU_MODES_INTERRUPT_MASK 0x1
#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
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