[rtems commit] bsp/xilinx-zynq: Use magic UART baud divisor

Sebastian Huber sebh at rtems.org
Wed Jun 19 10:58:39 UTC 2013


Module:    rtems
Branch:    master
Commit:    cb6b9bab291eec1a53ac12c3642b27a95190d0af
Changeset: http://git.rtems.org/rtems/commit/?id=cb6b9bab291eec1a53ac12c3642b27a95190d0af

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Wed Jun 19 12:57:54 2013 +0200

bsp/xilinx-zynq: Use magic UART baud divisor

Use a baud divisor suitable for the evaluation board.

---

 .../lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c b/c/src/lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c
index a33d60c..1ac7352 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c
@@ -36,8 +36,8 @@ static void zynq_uart_initialize(int minor)
   regs->mode = ZYNQ_UART_MODE_CHMODE(ZYNQ_UART_MODE_CHMODE_NORMAL)
     | ZYNQ_UART_MODE_PAR(ZYNQ_UART_MODE_PAR_NONE)
     | ZYNQ_UART_MODE_CHRL(ZYNQ_UART_MODE_CHRL_8);
-  regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(1);
-  regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(0xff);
+  regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(0x3e);
+  regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(0x6);
   regs->rx_fifo_trg_lvl = ZYNQ_UART_RX_FIFO_TRG_LVL_RTRIG(0);
   regs->rx_timeout = ZYNQ_UART_RX_TIMEOUT_RTO(0);
   regs->control = ZYNQ_UART_CONTROL_RXEN




More information about the vc mailing list