[rtems commit] bsps/arm: Fix set exception handler for ARMv7

Sebastian Huber sebh at rtems.org
Wed Jun 26 08:26:00 UTC 2013


Module:    rtems
Branch:    master
Commit:    4b83e8f1c415f5365ae4cc0b9894c2174ee9f670
Changeset: http://git.rtems.org/rtems/commit/?id=4b83e8f1c415f5365ae4cc0b9894c2174ee9f670

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Fri Jun 21 09:59:27 2013 +0200

bsps/arm: Fix set exception handler for ARMv7

---

 .../arm/shared/arm-cp15-set-exception-handler.c    |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c b/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c
index 01db6d8..6497aca 100644
--- a/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c
+++ b/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c
@@ -37,7 +37,15 @@ void arm_cp15_set_exception_handler(
       ctrl = arm_cp15_mmu_disable(cls);
 
       mirror_table[exception] = (uint32_t) handler;
+
       rtems_cache_flush_multiple_data_lines(mirror_table, table_size);
+
+      /*
+       * On ARMv7 processors with the Security Extension the mirror table might
+       * be the actual table used by the processor.
+       */
+      rtems_cache_invalidate_multiple_instruction_lines(mirror_table, table_size);
+
       rtems_cache_invalidate_multiple_instruction_lines(cpu_table, table_size);
 
       arm_cp15_set_control(ctrl);




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