[rtems commit] bsps/arm: Init trans tbl with invalid entries

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    0f874ee501262436ffdfe6ac84a09b9f0628b286
Changeset: http://git.rtems.org/rtems/commit/?id=0f874ee501262436ffdfe6ac84a09b9f0628b286

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Sun Oct 27 18:51:53 2013 +0100

bsps/arm: Init trans tbl with invalid entries

---

 .../lib/libbsp/arm/shared/include/arm-cp15-start.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
index 88f903b..b5d5de8 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
@@ -90,9 +90,9 @@ arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
   arm_cp15_set_domain_access_control(dac);
   arm_cp15_set_translation_table_base(ttb);
 
-  /* Initialize translation table with fixed-map read-write entries */
+  /* Initialize translation table with invalid entries */
   for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
-    ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | ARMV7_MMU_DATA_READ_WRITE;
+    ttb [i] = 0;
   }
 
   for (i = 0; i < config_count; ++i) {