[rtems-schedsim commit] schedsim_smpsimple: Change scenario to match what the output.

[Jennifer Averett]

Module:    rtems-schedsim
Branch:    master
Commit:    5afe3191162e7cffde7ad10d2c612f33ac5f262e
Changeset: http://git.rtems.org/rtems-schedsim/commit/?id=5afe3191162e7cffde7ad10d2c612f33ac5f262e

Author:    Jennifer Averett <jennifer.averett at oarcorp.com>
Date:      Wed May 14 09:25:27 2014 -0500

schedsim_smpsimple:  Change scenario to match what the output.

---

 .../scenarios/cpus4_pick_older.expected            |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/schedsim/shell/schedsim_smpsimple/scenarios/cpus4_pick_older.expected b/schedsim/shell/schedsim_smpsimple/scenarios/cpus4_pick_older.expected
index 9dedbb6..81578af 100644
--- a/schedsim/shell/schedsim_smpsimple/scenarios/cpus4_pick_older.expected
+++ b/schedsim/shell/schedsim_smpsimple/scenarios/cpus4_pick_older.expected
@@ -116,8 +116,8 @@ Task (smp8) starting: id=0x0a010008, priority=4
 ==> 35: cpus
 === CPU Status
           EXECUTING      /   HEIR             / SWITCH NEEDED
-  CPU 0: 0x0a010008 @  4 / 0x0a010008 @  4          false
+  CPU 0: 0x0a010005 @  5 / 0x0a010005 @  5          false
   CPU 1: 0x0a010006 @  5 / 0x0a010006 @  5          false
-  CPU 2: 0x0a010007 @  5 / 0x0a010007 @  5          false
+  CPU 2: 0x0a010008 @  4 / 0x0a010008 @  4          false
   CPU 3: 0x0a010001 @  3 / 0x0a010001 @  3          false
 === End of Ready Set of Threads