[rtems commit] bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs
Sebastian Huber
sebh at rtems.org
Thu Nov 20 13:53:25 UTC 2014
Module: rtems
Branch: master
Commit: 50440c065e247899ee739d56cb1392c259289031
Changeset: http://git.rtems.org/rtems/commit/?id=50440c065e247899ee739d56cb1392c259289031
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Wed Nov 19 15:30:24 2014 +0100
bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs
---
c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am | 1 +
c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac | 6 +++
.../libbsp/arm/altera-cyclone-v/startup/bspsmp.c | 47 ----------------------
c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am | 8 ++--
c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac | 8 ++++
.../libbsp/arm/realview-pbx-a9/startup/bspsmp.c | 24 +++++++++++
c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c | 18 ++++-----
c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 9 +++--
c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 8 ++++
c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c | 24 +++++++++++
.../libbsp/arm/xilinx-zynq/startup/bspstarthooks.c | 10 ++++-
11 files changed, 98 insertions(+), 65 deletions(-)
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am b/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am
index 6e2d431..3e02200 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am
@@ -174,6 +174,7 @@ libbsp_a_SOURCES += startup/bspstarthooks.c
libbsp_a_SOURCES += startup/nocache-heap.c
libbsp_a_SOURCES += startup/mmu-config.c
if HAS_SMP
+libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
libbsp_a_SOURCES += startup/bspsmp.c
endif
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac b/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
index fc2b4b0..04ebe3a 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
@@ -24,6 +24,12 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
+RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],[enable data cache])
+
+RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable instruction cache])
+
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[altcycv_devkit*],[200000000U])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
index 591e1cd..0d95218 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
@@ -12,14 +12,8 @@
* http://www.rtems.org/license/LICENSE.
*/
-#include <assert.h>
-
#include <rtems/score/smpimpl.h>
-#include <libcpu/arm-cp15.h>
-
-#include <bsp/irq.h>
-#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <socal/alt_rstmgr.h>
@@ -27,19 +21,6 @@
#include <socal/hps.h>
#include <socal/socal.h>
-static void bsp_inter_processor_interrupt(void *arg)
-{
- _SMP_Inter_processor_interrupt_handler();
-}
-
-uint32_t _CPU_SMP_Initialize(void)
-{
- uint32_t hardware_count = arm_gic_irq_processor_count();
- uint32_t linker_count = (uint32_t) bsp_processor_count;
-
- return hardware_count <= linker_count ? hardware_count : linker_count;
-}
-
bool _CPU_SMP_Start_processor(uint32_t cpu_index)
{
bool started;
@@ -66,31 +47,3 @@ bool _CPU_SMP_Start_processor(uint32_t cpu_index)
return started;
}
-
-void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
-{
- if (cpu_count > 0) {
- rtems_status_code sc;
-
- sc = rtems_interrupt_handler_install(
- ARM_GIC_IRQ_SGI_0,
- "IPI",
- RTEMS_INTERRUPT_UNIQUE,
- bsp_inter_processor_interrupt,
- NULL
- );
- assert(sc == RTEMS_SUCCESSFUL);
-
- /* Enable unified L2 cache */
- rtems_cache_enable_data();
- }
-}
-
-void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
-{
- arm_gic_irq_generate_software_irq(
- ARM_GIC_IRQ_SGI_0,
- ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
- (uint8_t) (1U << target_processor_index)
- );
-}
diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am
index 42e53fa..2cc7aa0 100644
--- a/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am
+++ b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am
@@ -97,6 +97,10 @@ libbsp_a_SOURCES += ../shared/arm-cp15-set-ttb-entries.c
# Startup
libbsp_a_SOURCES += startup/bspreset.c
libbsp_a_SOURCES += startup/bspstart.c
+if HAS_SMP
+libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
+libbsp_a_SOURCES += startup/bspsmp.c
+endif
# IRQ
libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
@@ -131,10 +135,6 @@ libbsp_a_SOURCES += startup/bspstarthooks.c
libbsp_a_SOURCES += ../shared/arm-pl111-fb.c
libbsp_a_SOURCES += startup/fb-config.c
-if HAS_SMP
-libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
-endif
-
###############################################################################
# Special Rules #
###############################################################################
diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac b/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac
index fba1d9d..d99786d 100644
--- a/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac
+++ b/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac
@@ -24,6 +24,14 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
+RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*qemu],[])
+RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],[enable data cache])
+
+RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*qemu],[])
+RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable instruction cache])
+
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspsmp.c b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspsmp.c
new file mode 100644
index 0000000..471e7e5
--- /dev/null
+++ b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspsmp.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/smpimpl.h>
+
+bool _CPU_SMP_Start_processor(uint32_t cpu_index)
+{
+ (void) cpu_index;
+
+ /* Nothing to do */
+
+ return true;
+}
diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c
index 6f4af46..f755621 100644
--- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c
+++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c
@@ -19,6 +19,7 @@
#include <libcpu/arm-cp15.h>
#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
static void bsp_inter_processor_interrupt(void *arg)
{
@@ -27,16 +28,10 @@ static void bsp_inter_processor_interrupt(void *arg)
uint32_t _CPU_SMP_Initialize(void)
{
- return arm_gic_irq_processor_count();
-}
-
-bool _CPU_SMP_Start_processor(uint32_t cpu_index)
-{
- (void) cpu_index;
+ uint32_t hardware_count = arm_gic_irq_processor_count();
+ uint32_t linker_count = (uint32_t) bsp_processor_count;
- /* Nothing to do */
-
- return true;
+ return hardware_count <= linker_count ? hardware_count : linker_count;
}
void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
@@ -52,6 +47,11 @@ void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
NULL
);
assert(sc == RTEMS_SUCCESSFUL);
+
+#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED)
+ /* Enable unified L2 cache */
+ rtems_cache_enable_data();
+#endif
}
}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
index 15f8af4..df4aa15 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
@@ -94,6 +94,10 @@ libbsp_a_SOURCES += ../shared/arm-cp15-set-ttb-entries.c
# Startup
libbsp_a_SOURCES += startup/bspreset.c
libbsp_a_SOURCES += startup/bspstart.c
+if HAS_SMP
+libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
+libbsp_a_SOURCES += startup/bspsmp.c
+endif
# IRQ
libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
@@ -122,16 +126,13 @@ libbsp_a_SOURCES += i2c/cadence-i2c.c
# Cache
libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
+libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
libbsp_a_SOURCES += ../shared/arm-l2c-310/cache_.h
libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/arm-l2c-310
# Start hooks
libbsp_a_SOURCES += startup/bspstarthooks.c startup/bspstartmmu.c
-if HAS_SMP
-libbsp_a_SOURCES += ../shared/arm-a9mpcore-smp.c
-endif
-
###############################################################################
# Special Rules #
###############################################################################
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
index 580049a..8f47f2f 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
@@ -24,6 +24,14 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
+RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*qemu],[])
+RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],[enable data cache])
+
+RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*qemu],[])
+RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable instruction cache])
+
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zc702*],[333333333U])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zedboard*],[666666667U])
RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c
new file mode 100644
index 0000000..3940352
--- /dev/null
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/smpimpl.h>
+
+bool _CPU_SMP_Start_processor(uint32_t cpu_index)
+{
+ /*
+ * Wait for secondary processor to complete its basic initialization so that
+ * we can enable the unified L2 cache.
+ */
+ return _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
+}
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c
index d8834f0..58f5ec6 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstarthooks.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -29,5 +29,13 @@ BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
arm_a9mpcore_start_hook_1();
bsp_start_copy_sections();
zynq_setup_mmu_and_cache();
+
+#if !defined(RTEMS_SMP) \
+ && (defined(BSP_DATA_CACHE_ENABLED) \
+ || defined(BSP_INSTRUCTION_CACHE_ENABLED))
+ /* Enable unified L2 cache */
+ rtems_cache_enable_data();
+#endif
+
bsp_start_clear_bss();
}
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