[rtems commit] powerpc/ep1a: Fix warnings
Joel Sherrill
joel at rtems.org
Mon Oct 13 15:23:38 UTC 2014
Module: rtems
Branch: master
Commit: 7a4c4f495b2cb427d7fa74cb062315a16aa6f611
Changeset: http://git.rtems.org/rtems/commit/?id=7a4c4f495b2cb427d7fa74cb062315a16aa6f611
Author: Joel Sherrill <joel.sherrill at oarcorp.com>
Date: Mon Oct 13 10:28:44 2014 -0500
powerpc/ep1a: Fix warnings
---
.../lib/libbsp/powerpc/ep1a/console/mc68360_scc.c | 146 ++++++++------------
.../libbsp/powerpc/ep1a/console/printk_support.c | 12 +-
c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c | 51 +++++--
.../lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c | 28 ----
c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c | 1 -
c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h | 12 +-
6 files changed, 106 insertions(+), 144 deletions(-)
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c b/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c
index ad9b570..b2dab2b 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c
@@ -167,25 +167,15 @@ mc68360_sccBRGC(int baud, int m360_clock_rate)
}
-/**************************************************************************
- * Function: sccInterruptHandler *
- **************************************************************************
- * Description: *
- * *
- * This is the interrupt service routine for the console UART. It *
- * handles both receive and transmit interrupts. The bulk of the *
- * work is done by termios. *
- * *
- * Inputs: *
- * *
- * chip - structure of chip specific information *
- * *
- * Output: *
- * *
- * none *
- * *
- **************************************************************************/
-void mc68360_sccInterruptHandler( M68360_t chip )
+/*
+ * sccInterruptHandler
+ *
+ * This is the interrupt service routine for the console UART. It
+ * handles both receive and transmit interrupts. The bulk of the
+ * work is done by termios.
+ *
+ */
+static void mc68360_sccInterruptHandler( M68360_t chip )
{
volatile m360_t *m360;
int port;
@@ -280,21 +270,17 @@ static int mc68360_scc_open(
)
{
M68360_serial_ports_t ptr;
- volatile m360_t *m360;
uint32_t data;
#ifdef DEBUG_360
printk("mc68360_scc_open %d\n", minor);
#endif
-
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
- m360 = ptr->chip->m360;
+ ptr = Console_Port_Tbl[minor]->pDeviceParams;
/*
* Enable the receiver and the transmitter.
*/
-
SYNC();
data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l);
scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l,
@@ -311,7 +297,7 @@ static int mc68360_scc_open(
return RTEMS_SUCCESSFUL;
}
-uint32_t mc68360_scc_calculate_pbdat( M68360_t chip )
+static uint32_t mc68360_scc_calculate_pbdat( M68360_t chip )
{
uint32_t i;
uint32_t pbdat_data;
@@ -336,8 +322,7 @@ uint32_t mc68360_scc_calculate_pbdat( M68360_t chip )
* This routine initializes the console's receive and transmit
* ring buffers and loads the appropriate vectors to handle the interrupts.
*/
-
-void mc68360_scc_initialize_interrupts(int minor)
+static void mc68360_scc_initialize_interrupts(int minor)
{
M68360_serial_ports_t ptr;
volatile m360_t *m360;
@@ -599,8 +584,7 @@ void mc68360_scc_initialize_interrupts(int minor)
*
* Console Termios output entry point when using interrupt driven output.
*/
-
-ssize_t mc68360_scc_write_support_int(
+static ssize_t mc68360_scc_write_support_int(
int minor,
const char *buf,
size_t len
@@ -657,8 +641,7 @@ ssize_t mc68360_scc_write_support_int(
*
* This routine polls out the requested character.
*/
-
-void mc68360_scc_write_polled(
+static void mc68360_scc_write_polled(
int minor,
char cChar
)
@@ -674,63 +657,57 @@ void mc68360_scc_write_polled(
* This function sets the DUART channel to reflect the requested termios
* port settings.
*/
-
-int mc68360_scc_set_attributes(
+static int mc68360_scc_set_attributes(
int minor,
const struct termios *t
)
{
- int baud;
- volatile m360_t *m360;
- M68360_serial_ports_t ptr;
- uint16_t value;
+ int baud;
+ M68360_serial_ports_t ptr;
+ uint16_t value;
#ifdef DEBUG_360
printk("mc68360_scc_set_attributes\n");
#endif
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
- m360 = ptr->chip->m360;
-
- switch (t->c_cflag & CBAUD)
- {
- case B50: baud = 50; break;
- case B75: baud = 75; break;
- case B110: baud = 110; break;
- case B134: baud = 134; break;
- case B150: baud = 150; break;
- case B200: baud = 200; break;
- case B300: baud = 300; break;
- case B600: baud = 600; break;
- case B1200: baud = 1200; break;
- case B1800: baud = 1800; break;
- case B2400: baud = 2400; break;
- case B4800: baud = 4800; break;
- case B9600: baud = 9600; break;
- case B19200: baud = 19200; break;
- case B38400: baud = 38400; break;
- case B57600: baud = 57600; break;
- case B115200: baud = 115200; break;
- case B230400: baud = 230400; break;
- case B460800: baud = 460800; break;
- default: baud = -1; break;
- }
-
- if (baud > 0)
- {
- scc_write32(
- "pBRGC",
- ptr->pBRGC,
- mc68360_sccBRGC(baud, ptr->chip->m360_clock_rate)
- );
- }
+ ptr = Console_Port_Tbl[minor]->pDeviceParams;
+
+ switch (t->c_cflag & CBAUD) {
+ case B50: baud = 50; break;
+ case B75: baud = 75; break;
+ case B110: baud = 110; break;
+ case B134: baud = 134; break;
+ case B150: baud = 150; break;
+ case B200: baud = 200; break;
+ case B300: baud = 300; break;
+ case B600: baud = 600; break;
+ case B1200: baud = 1200; break;
+ case B1800: baud = 1800; break;
+ case B2400: baud = 2400; break;
+ case B4800: baud = 4800; break;
+ case B9600: baud = 9600; break;
+ case B19200: baud = 19200; break;
+ case B38400: baud = 38400; break;
+ case B57600: baud = 57600; break;
+ case B115200: baud = 115200; break;
+ case B230400: baud = 230400; break;
+ case B460800: baud = 460800; break;
+ default: baud = -1; break;
+ }
+
+ if (baud > 0) {
+ scc_write32(
+ "pBRGC",
+ ptr->pBRGC,
+ mc68360_sccBRGC(baud, ptr->chip->m360_clock_rate)
+ );
+ }
/* Initial value of PSMR should be 0 */
value = M360_PSMR_UM_NORMAL;
/* set the number of data bits, 8 is most common */
- if (t->c_cflag & CSIZE) /* was it specified? */
- {
+ if (t->c_cflag & CSIZE) { /* was it specified? */
switch (t->c_cflag & CSIZE) {
case CS5: value |= M360_PSMR_CL5; break;
case CS6: value |= M360_PSMR_CL6; break;
@@ -750,8 +727,7 @@ printk("mc68360_scc_set_attributes\n");
/* Set Parity M360_PSMR_PEN bit should be clear on no parity so
* do nothing in that case
*/
- if (t->c_cflag & PARENB) /* enable parity detection? */
- {
+ if (t->c_cflag & PARENB) { /* enable parity detection? */
value |= M360_PSMR_PEN;
if (t->c_cflag & PARODD){
value |= M360_PSMR_RPM_ODD; /* select odd parity */
@@ -774,14 +750,13 @@ printk("mc68360_scc_set_attributes\n");
*
* This function shuts down the requested port.
*/
-
-int mc68360_scc_close(
+static int mc68360_scc_close(
int major,
int minor,
void *arg
)
{
- return(RTEMS_SUCCESSFUL);
+ return RTEMS_SUCCESSFUL;
}
/*
@@ -789,12 +764,11 @@ int mc68360_scc_close(
*
* Console Termios polling input entry point.
*/
-
-int mc68360_scc_inbyte_nonblocking_polled(
+static int mc68360_scc_inbyte_nonblocking_polled(
int minor
)
{
- return -1;
+ return -1;
}
/*
@@ -803,8 +777,7 @@ int mc68360_scc_inbyte_nonblocking_polled(
* Console Termios output entry point when using polled output.
*
*/
-
-ssize_t mc68360_scc_write_support_polled(
+static ssize_t mc68360_scc_write_support_polled(
int minor,
const char *buf,
size_t len
@@ -820,8 +793,7 @@ ssize_t mc68360_scc_write_support_polled(
*
* This function initializes the DUART to a quiecsent state.
*/
-
-void mc68360_scc_init(int minor)
+static void mc68360_scc_init(int minor)
{
#ifdef DEBUG_360
printk("mc68360_scc_init\n");
@@ -899,7 +871,7 @@ int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector )
chip->board_data->busNo,
chip->board_data->slotNo,
chip->board_data->funcNo,
- &mc68360_sccInterruptHandler,
+ (FUNCTION_PTR) &mc68360_sccInterruptHandler,
(uintptr_t) chip
);
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c b/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c
index 57fd450..e5b75f4 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c
@@ -1,7 +1,9 @@
/*
- * This file contains the ep1a printk support routines
- *
- * COPYRIGHT (c) 2011.
+ * This file contains the ep1a printk support routines.
+ */
+
+/*
+ * COPYRIGHT (c) 2011-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -19,8 +21,7 @@
rtems_device_minor_number BSPPrintkPort = 0;
/* const char arg to be compatible with BSP_output_char decl. */
-void
-debug_putc_onlcr(const char c)
+static void debug_putc_onlcr(const char c)
{
volatile int i;
@@ -30,7 +31,6 @@ debug_putc_onlcr(const char c)
* forces a character to be polled out of com1
* regardless of where the console is.
*/
-
volatile unsigned char *ptr = (void *)0xff800000;
if ('\n'==c){
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
index 2d991c9..cba05a4 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
@@ -1,7 +1,9 @@
/*
* This file contains the implementation of rtems initialization
* related to interrupt handling.
- *
+ */
+
+/*
* CopyRight (C) 1999 valette at crf.canon.fr
*
* Enhanced by Jay Kulpinski <jskulpin at eng01.gdds.com>
@@ -34,25 +36,42 @@
*/
#define TRACE_IRQ_INIT
-/*
- * default on/off function
- */
-static void nop_func(void){}
-/*
- * default isOn function
- */
-static int not_connected(void) {return 0;}
-/*
- * default possible isOn function
- */
-static int connected(void) {return 1;}
+static void IRQ_Default_rtems_irq_hdl(
+ rtems_irq_hdl_param ptr
+)
+{
+}
+
+static void IRQ_Default_rtems_irq_enable(
+ const struct __rtems_irq_connect_data__ *ptr
+)
+{
+}
+
+static void IRQ_Default_rtems_irq_disable(
+ const struct __rtems_irq_connect_data__ *ptr
+)
+{
+}
+
+static int IRQ_Default_rtems_irq_is_enabled(
+ const struct __rtems_irq_connect_data__ *ptr)
+{
+ return 1;
+}
static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
static rtems_irq_global_settings initial_config;
-static rtems_irq_connect_data defaultIrq = {
- /* vectorIdex, hdl , handle , on , off , isOn */
- 0, nop_func , NULL , nop_func , nop_func , not_connected
+
+static rtems_irq_connect_data defaultIrq = {
+ .name = 0,
+ .hdl = IRQ_Default_rtems_irq_hdl,
+ .handle = NULL,
+ .on = IRQ_Default_rtems_irq_enable,
+ .on = IRQ_Default_rtems_irq_disable,
+ .isOn = IRQ_Default_rtems_irq_is_enabled
};
+
static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
/*
* actual rpiorities for interrupt :
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c b/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
index 67af151..23b1ce2 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
@@ -67,34 +67,6 @@ static inline int is_pci_irq(const rtems_irq_number irqLine)
/*
* ------------------------ RTEMS Irq helper functions ----------------
*/
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
-/*
- * Caution : this function assumes the variable "*config"
- * is already set and that the tables it contains are still valid
- * and accessible.
- */
-static void compute_i8259_masks_from_prio (rtems_irq_global_settings* config)
-{
- int i;
- int j;
- /*
- * Always mask at least current interrupt to prevent re-entrance
- */
- for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
- * ((unsigned short*) &irq_mask_or_tbl[i]) = (1 << i);
- for (j = BSP_ISA_IRQ_LOWEST_OFFSET; j < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; j++) {
- /*
- * Mask interrupts at i8259 level that have a lower priority
- */
- if (config->irqPrioTbl [i] > config->irqPrioTbl [j]) {
- * ((unsigned short*) &irq_mask_or_tbl[i]) |= (1 << j);
- }
- }
- }
-}
-#endif
-
void
BSP_enable_irq_at_pic(const rtems_irq_number name)
{
diff --git a/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c b/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c
index d97004e..123f793 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c
@@ -22,7 +22,6 @@
* For the 8240 and the 8245 there is no host bridge the
* Open PIC device is built into the processor chip.
*/
-
void detect_host_bridge(void)
{
OpenPIC=(volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET );
diff --git a/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h
index a704c15..1a57610 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h
+++ b/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h
@@ -102,12 +102,12 @@
*/
extern int _BSP_vme_bridge_irq;
-extern int BSP_VMEInit();
-extern int BSP_VMEIrqMgrInstall();
+extern int BSP_VMEInit(void);
+extern int BSP_VMEIrqMgrInstall(void);
-#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
- do { \
- err = vmeUniverseInstallIrqMgr(0,5,1,6); \
- } while (0)
+#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
+ do { \
+ err = vmeUniverseInstallIrqMgr(0,5,1,6); \
+ } while (0)
#endif
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