[rtems commit] bsp/mpc55xxevb: Fix flash settings for MPC5510

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    e08b0b917c6ef24945da7c395f1410e86b966dcb
Changeset: http://git.rtems.org/rtems/commit/?id=e08b0b917c6ef24945da7c395f1410e86b966dcb

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Thu Oct 30 14:29:09 2014 +0100

bsp/mpc55xxevb: Fix flash settings for MPC5510

---

 .../powerpc/mpc55xxevb/startup/start-flash.S       |   65 +++++++++++++-------
 .../lib/libcpu/powerpc/mpc55xx/include/reg-defs.h  |    3 +-
 2 files changed, 45 insertions(+), 23 deletions(-)

diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-flash.S b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-flash.S
index d4dc52c..a42d26e 100644
--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-flash.S
+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-flash.S
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -25,12 +25,33 @@
 
 	.section	".bsp_start_text", "ax"
 
-/* Optimized flash configurations (Table 13-15 [MPC5567 Microcontroller Reference Manual]) */
 .equ FLASH_SETTINGS_RESET, 0xff00
-.equ FLASH_SETTINGS_82, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_1 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
-.equ FLASH_SETTINGS_102, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_2 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
-.equ FLASH_SETTINGS_132, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_2 | FLASH_BUICR_RWSC_3 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
-.equ FLASH_SETTINGS_264, 0x01716B15
+
+#if MPC55XX_CHIP_FAMILY == 551
+
+/* MPC5510 Microcontroller Family Data Sheet, Rev. 3, Table 16, Num 7 */
+.equ FLASH_CLOCK_0, 25
+.equ FLASH_CLOCK_1, 50
+.equ FLASH_CLOCK_2, 80
+.equ FLASH_CLOCK_3, FLASH_CLOCK_2
+.equ FLASH_SETTINGS_0, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_0 | FLASH_BUICR_RWSC_0 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_1 | FLASH_BUICR_IPFEN_1 | FLASH_BUICR_PFLIM_2 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_1, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_1 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_1 | FLASH_BUICR_IPFEN_1 | FLASH_BUICR_PFLIM_2 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_2, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_2 | FLASH_BUICR_RWSC_2 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_1 | FLASH_BUICR_IPFEN_1 | FLASH_BUICR_PFLIM_2 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_3, FLASH_SETTINGS_2
+
+#else
+
+/* Optimized flash configurations (Table 13-15 [MPC5567 Microcontroller Reference Manual]) */
+.equ FLASH_CLOCK_0, 82
+.equ FLASH_CLOCK_1, 102
+.equ FLASH_CLOCK_2, 132
+.equ FLASH_CLOCK_3, 264
+.equ FLASH_SETTINGS_0, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_1 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_1, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_2 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_2, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_2 | FLASH_BUICR_RWSC_3 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
+.equ FLASH_SETTINGS_3, 0x01716B15
+
+#endif
 
 /**
  * @fn void mpc55xx_start_flash()
@@ -53,31 +74,31 @@ GLOBAL_FUNCTION mpc55xx_start_flash
 
 	/* Flash settings dependent on system clock */
 	bl	mpc55xx_get_system_clock
-	LWI	r4, 82000000
+	LWI	r4, FLASH_CLOCK_0
 	cmpw	r3, r4
-	ble	clock_82
-	LWI	r4, 102000000
+	ble	clock_0
+	LWI	r4, FLASH_CLOCK_1
 	cmpw	r3, r4
-	ble	clock_102
-	LWI	r4, 132000000
+	ble	clock_1
+	LWI	r4, FLASH_CLOCK_2
 	cmpw	r3, r4
-	ble	clock_132
-	LWI	r4, 264000000
+	ble	clock_2
+	LWI	r4, FLASH_CLOCK_3
 	cmpw	r3, r4
-	ble	clock_264
+	ble	clock_3
 	LWI	r3, FLASH_SETTINGS_RESET
 	b	settings_done
-clock_82:
-	LWI	r3, FLASH_SETTINGS_82
+clock_0:
+	LWI	r3, FLASH_SETTINGS_0
 	b	settings_done
-clock_102:
-	LWI	r3, FLASH_SETTINGS_102
+clock_1:
+	LWI	r3, FLASH_SETTINGS_1
 	b	settings_done
-clock_132:
-	LWI	r3, FLASH_SETTINGS_132
+clock_2:
+	LWI	r3, FLASH_SETTINGS_2
 	b settings_done
-clock_264:
-	LWI	r3, FLASH_SETTINGS_264
+clock_3:
+	LWI	r3, FLASH_SETTINGS_3
 	b	settings_done
 settings_done:
 
diff --git a/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h b/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
index 977e1be..2d66f6a 100644
--- a/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
+++ b/c/src/lib/libcpu/powerpc/mpc55xx/include/reg-defs.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -51,6 +51,7 @@
 #define FLASH_BUICR_CPU_PREFTCH 0x00010000
 
 /* Fields for APC (access pipelining control bits [16:18]) */
+#define FLASH_BUICR_APC_0 0x00000000
 #define FLASH_BUICR_APC_1 0x00002000
 #define FLASH_BUICR_APC_2 0x00004000
 #define FLASH_BUICR_APC_3 0x00006000