[rtems commit] ARM: Support VFP-D16

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    dc9aaf7ced34501d7647a86b4c626c9cc056db01
Changeset: http://git.rtems.org/rtems/commit/?id=dc9aaf7ced34501d7647a86b4c626c9cc056db01

Author:    Martin Galvan <martin.galvan at tallertechnologies.com>
Date:      Fri Feb 20 10:08:01 2015 -0300

ARM: Support VFP-D16

This patch allows the existing FPU code to support both VFP-D16 and
VFP-D32. According to ARM, writes to D32DIS are ignored for D16 so
there's no need to enclose the bic instruction with an #ifdef. We tested
it on a TMS570LS3137 using TI initialization code and it works fine.

Signed-off by: Martin Galvan <martin.galvan at tallertechnologies.com>

---

 c/src/lib/libbsp/arm/shared/start/start.S | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S
index 63b3250..f5f0fa4 100644
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -187,7 +187,7 @@ _start:
 
 	/* Stay in SVC mode */
 
-#ifdef ARM_MULTILIB_VFP_D32
+#ifdef ARM_MULTILIB_VFP
 	/* Read CPACR */
 	mrc p15, 0, r0, c1, c0, 2
 
@@ -195,7 +195,9 @@ _start:
 	orr r0, r0, #(1 << 20)
 	orr r0, r0, #(1 << 22)
 
-	/* Clear ASEDIS and D32DIS */
+	/*
+	 * Clear ASEDIS and D32DIS.  Writes to D32DIS are ignored for VFP-D16.
+	 */
 	bic r0, r0, #(3 << 30)
 
 	/* Write CPACR */
@@ -205,7 +207,7 @@ _start:
 	/* Enable FPU */
 	mov r0, #(1 << 30)
 	vmsr FPEXC, r0
-#endif
+#endif /* ARM_MULTILIB_VFP */
 
 	/*
 	 * Branch to start hook 0.