[rtems commit] powerpc: Use PPC_HAS_FPU

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    2e19bfde2f557a3e5fdfb176de48a668c34545af
Changeset: http://git.rtems.org/rtems/commit/?id=2e19bfde2f557a3e5fdfb176de48a668c34545af

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Tue Dec 23 12:27:53 2014 +0100

powerpc: Use PPC_HAS_FPU

Provide floating point context support only if PPC_HAS_FPU == 1.

---

 c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 12 ++++++------
 cpukit/score/cpu/powerpc/rtems/score/cpu.h        |  2 ++
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
index 3b0b121..26ef58d 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
@@ -56,8 +56,12 @@
 #define PPC_CONTEXT_CACHE_LINE_3 (4 * PPC_DEFAULT_CACHE_LINE_SIZE)
 #define PPC_CONTEXT_CACHE_LINE_4 (5 * PPC_DEFAULT_CACHE_LINE_SIZE)
 
+	BEGIN_CODE
+
+#if PPC_HAS_FPU == 1
+
 /*
- * Offsets for various Contexts
+ * Offsets for Context_Control_fp
  */
 
 #if (PPC_HAS_DOUBLE==1)
@@ -104,7 +108,6 @@
 	.set	FP_31, (FP_30 + FP_SIZE)
 	.set	FP_FPSCR, (FP_31 + FP_SIZE)
 
-	BEGIN_CODE
 /*
  *  _CPU_Context_save_fp_context
  *
@@ -121,7 +124,6 @@
 	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
 	PUBLIC_PROC (_CPU_Context_save_fp)
 PROC (_CPU_Context_save_fp):
-#if (PPC_HAS_FPU == 1)
 /* A FP context switch may occur in an ISR or exception handler when the FPU is not
  * available. Therefore, we must explicitely enable it here!
  */
@@ -171,7 +173,6 @@ PROC (_CPU_Context_save_fp):
 	mtmsr	r4
 	isync
 1:
-#endif
 	blr
 
 /*
@@ -190,7 +191,6 @@ PROC (_CPU_Context_save_fp):
 	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
 	PUBLIC_PROC (_CPU_Context_restore_fp)
 PROC (_CPU_Context_restore_fp):
-#if (PPC_HAS_FPU == 1)
 	lwz	r3, 0(r3)
 /* A FP context switch may occur in an ISR or exception handler when the FPU is not
  * available. Therefore, we must explicitely enable it here!
@@ -240,8 +240,8 @@ PROC (_CPU_Context_restore_fp):
 	mtmsr	r4
 	isync
 1:
-#endif
 	blr
+#endif /* PPC_HAS_FPU == 1 */
 
 	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
 	PUBLIC_PROC (_CPU_Context_switch)
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index 29a2833..26255a6 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -392,6 +392,7 @@ static inline ppc_context *ppc_get_context( const Context_Control *context )
 
 #ifndef ASM
 typedef struct {
+#if (PPC_HAS_FPU == 1)
     /* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over
      * procedure calls.  However, this would mean that the interrupt
      * frame had to hold f0-f13, and the fpscr.  And as the majority
@@ -405,6 +406,7 @@ typedef struct {
     float	f[32];
     uint32_t	fpscr;
 #endif
+#endif /* (PPC_HAS_FPU == 1) */
 } Context_Control_fp;
 
 typedef struct CPU_Interrupt_frame {