[rtems commit] doc: Fix interrupt level ARM documentation
Sebastian Huber
sebh at rtems.org
Fri Jun 26 19:39:48 UTC 2015
Module: rtems
Branch: master
Commit: cb2b8f02dd701389084a23188705ef393ef609db
Changeset: http://git.rtems.org/rtems/commit/?id=cb2b8f02dd701389084a23188705ef393ef609db
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Fri Jun 26 21:39:16 2015 +0200
doc: Fix interrupt level ARM documentation
---
doc/cpu_supplement/arm.t | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/doc/cpu_supplement/arm.t b/doc/cpu_supplement/arm.t
index 88693aa..304e1e1 100644
--- a/doc/cpu_supplement/arm.t
+++ b/doc/cpu_supplement/arm.t
@@ -152,10 +152,9 @@ confusion.
@subsection Interrupt Levels
-The RTEMS interrupt level mapping scheme for the ARM is not a numeric level as
-on most RTEMS ports. It is a bit mapping that corresponds the enable bit
-postions in the Current Program Status Register (CPSR). There are only two
-levels: IRQ enabled and IRQ disabled.
+There are exactly two interrupt levels on ARM with respect to RTEMS. Level
+zero corresponds to interrupts enabled. Level one corresponds to interrupts
+disabled.
@subsection Interrupt Stack
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