[rtems commit] doc: Clarify SPARC floating point ABI
Sebastian Huber
sebh at rtems.org
Thu May 21 08:26:15 UTC 2015
Module: rtems
Branch: master
Commit: a9c4f15dbe5d0db8727dc7a9c82fc9ffa00e8cb6
Changeset: http://git.rtems.org/rtems/commit/?id=a9c4f15dbe5d0db8727dc7a9c82fc9ffa00e8cb6
Author: Alexander Krutwig <alexander.krutwig at embedded-brains.de>
Date: Tue May 5 15:32:03 2015 +0200
doc: Clarify SPARC floating point ABI
---
doc/cpu_supplement/sparc.t | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t
index d21e9fe..740643a 100644
--- a/doc/cpu_supplement/sparc.t
+++ b/doc/cpu_supplement/sparc.t
@@ -425,10 +425,15 @@ f4, ... f30)
f8, ... f28)
@end itemize
-The floating point status register (fpsr) specifies
+The floating point status register (FSR) specifies
the behavior of the floating point unit for rounding, contains
its condition codes, version specification, and trap information.
+According to the ABI all floating point registers and the floating point status
+register (FSR) are volatile. Thus the floating point context of a thread is the
+empty set. The rounding direction is a system global state and must not be
+modified by threads.
+
A queue of the floating point instructions which have
started execution but not yet completed is maintained. This
queue is needed to support the multiple cycle nature of floating
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