[rtems commit] arm: Use compiler memory barrier by default

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    39e3e2014085fd09f8caba940c52ea89eb0ec343
Changeset: http://git.rtems.org/rtems/commit/?id=39e3e2014085fd09f8caba940c52ea89eb0ec343

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Tue Sep  1 09:42:46 2015 +0200

arm: Use compiler memory barrier by default

---

 cpukit/score/cpu/arm/rtems/score/cpu.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 6aced79..6ed6ef9 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -8,7 +8,7 @@
  *  This include file contains information pertaining to the ARM
  *  processor.
  *
- *  Copyright (c) 2009-2014 embedded brains GmbH.
+ *  Copyright (c) 2009-2015 embedded brains GmbH.
  *
  *  Copyright (c) 2007 Ray Xu <Rayx.cn at gmail.com>
  *
@@ -301,6 +301,8 @@ static inline void _ARM_Data_memory_barrier( void )
 {
 #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
   __asm__ volatile ( "dmb" : : : "memory" );
+#else
+  RTEMS_COMPILER_MEMORY_BARRIER();
 #endif
 }
 
@@ -308,6 +310,8 @@ static inline void _ARM_Data_synchronization_barrier( void )
 {
 #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
   __asm__ volatile ( "dsb" : : : "memory" );
+#else
+  RTEMS_COMPILER_MEMORY_BARRIER();
 #endif
 }
 
@@ -315,6 +319,8 @@ static inline void _ARM_Instruction_synchronization_barrier( void )
 {
 #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
   __asm__ volatile ( "isb" : : : "memory" );
+#else
+  RTEMS_COMPILER_MEMORY_BARRIER();
 #endif
 }