[rtems commit] Fix exception handler for supporting FPU
Sebastian Huber
sebh at rtems.org
Wed Sep 23 12:54:09 UTC 2015
Module: rtems
Branch: master
Commit: 7263a50d6c0edc657ac33295dd0d83cf2a8cad9e
Changeset: http://git.rtems.org/rtems/commit/?id=7263a50d6c0edc657ac33295dd0d83cf2a8cad9e
Author: Sudarshan Rajagopalan <sudarshan.rajagopalan at vecna.com>
Date: Thu Aug 27 14:19:24 2015 -0400
Fix exception handler for supporting FPU
---
cpukit/score/cpu/arm/armv7m-exception-default.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpukit/score/cpu/arm/armv7m-exception-default.c b/cpukit/score/cpu/arm/armv7m-exception-default.c
index e890cdf..2ddc6fc 100644
--- a/cpukit/score/cpu/arm/armv7m-exception-default.c
+++ b/cpukit/score/cpu/arm/armv7m-exception-default.c
@@ -28,10 +28,10 @@ void __attribute__((naked)) _ARMV7M_Exception_default( void )
"mov r2, lr\n"
"mrs r1, msp\n"
"mrs r0, psp\n"
- "cmn r2, #3\n"
- "itt ne\n"
- "movne r0, r1\n"
- "addne r0, %[cpufsz]\n"
+ "tst lr, #4\n"
+ "itt eq\n"
+ "moveq r0, r1\n"
+ "addeq r0, %[cpufsz]\n"
"add r2, r0, %[v7mlroff]\n"
"add r1, sp, %[cpulroff]\n"
"ldm r2, {r3-r5}\n"
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