[rtems commit] Beaglebone: fix missing clobber in inline assembly.
Joel Sherril
joel at rtems.org
Thu Sep 10 18:22:40 UTC 2015
Module: rtems
Branch: master
Commit: bebfc4209b4e6a8fc9eab55e592cdaf18ee7df8d
Changeset: http://git.rtems.org/rtems/commit/?id=bebfc4209b4e6a8fc9eab55e592cdaf18ee7df8d
Author: Marcos Diaz <marcos.diaz at tallertechnologies.com>
Date: Thu Sep 10 10:20:41 2015 -0500
Beaglebone: fix missing clobber in inline assembly.
flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.
closes #2416.
---
c/src/lib/libbsp/arm/beagle/include/bsp.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h b/c/src/lib/libbsp/arm/beagle/include/bsp.h
index 0250749..d9fd2ae 100644
--- a/c/src/lib/libbsp/arm/beagle/include/bsp.h
+++ b/c/src/lib/libbsp/arm/beagle/include/bsp.h
@@ -112,7 +112,13 @@ static inline void isb(void)
/* flush data cache */
static inline void flush_data_cache(void)
{
- asm volatile("mov r0, #0; mcr p15, #0, r0, c7, c10, #4" : : : "memory");
+ asm volatile(
+ "mov r0, #0\n"
+ "mcr p15, #0, r0, c7, c10, #4\n"
+ : /* No outputs */
+ : /* No inputs */
+ : "r0","memory"
+ );
}
#define __arch_getb(a) (*(volatile unsigned char *)(a))
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