[rtems commit] bsp/qoriq: Move L1 cache invalidate function

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    582e427280d00cde3bdac7c81e8fa26bec7fbde9
Changeset: http://git.rtems.org/rtems/commit/?id=582e427280d00cde3bdac7c81e8fa26bec7fbde9

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Fri Apr 22 13:09:39 2016 +0200

bsp/qoriq: Move L1 cache invalidate function

---

 c/src/lib/libbsp/powerpc/qoriq/Makefile.am       |  1 +
 c/src/lib/libbsp/powerpc/qoriq/start/start.S     | 20 +----------
 c/src/lib/libbsp/powerpc/qoriq/startup/l1cache.S | 43 ++++++++++++++++++++++++
 3 files changed, 45 insertions(+), 19 deletions(-)

diff --git a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am
index 936f857..2fd34e9 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am
@@ -70,6 +70,7 @@ libbsp_a_SOURCES += \
 	../shared/startup/bspidle.c \
 	../shared/uboot_getenv.c \
 	../shared/uboot_dump_bdinfo.c \
+	startup/l1cache.S \
 	startup/l2cache.S \
 	startup/mmu.c \
 	startup/mmu-tlb1.S \
diff --git a/c/src/lib/libbsp/powerpc/qoriq/start/start.S b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
index 466df88..64f7f2e 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/start/start.S
+++ b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
@@ -60,25 +60,7 @@ _start:
 	bl	bsp_fdt_copy
 #endif /* U_BOOT_USE_FDT */
 
-	/* Invalidate L1 data cache */
-	mfspr	r3, FSL_EIS_L1CSR0
-	ori	r3, r3, FSL_EIS_L1CSR0_CFI
-	mtspr	FSL_EIS_L1CSR0, r3
-1:
-	mfspr	r3, FSL_EIS_L1CSR0
-	andi.	r3, r3, FSL_EIS_L1CSR0_CFI
-	bne	1b
-	isync
-
-	/* Invalidate L1 instruction cache */
-	mfspr	r3, FSL_EIS_L1CSR1
-	ori	r3, r3, FSL_EIS_L1CSR1_ICFI
-	mtspr	FSL_EIS_L1CSR1, r3
-1:
-	mfspr	r3, FSL_EIS_L1CSR1
-	andi.	r3, r3, FSL_EIS_L1CSR1_ICFI
-	bne	1b
-	isync
+	bl	qoriq_l1cache_invalidate
 
 #ifdef QORIQ_CLUSTER_1_L2CSR0
 	LWI	r3, QORIQ_CLUSTER_1_L2CSR0
diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/l1cache.S b/c/src/lib/libbsp/powerpc/qoriq/startup/l1cache.S
new file mode 100644
index 0000000..bee3d28
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/qoriq/startup/l1cache.S
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2015, 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <libcpu/powerpc-utility.h>
+
+	.global qoriq_l1cache_invalidate
+
+	.section ".bsp_start_text", "ax"
+
+qoriq_l1cache_invalidate:
+
+	/* Invalidate L1 data cache */
+	mfspr	r3, FSL_EIS_L1CSR0
+	ori	r3, r3, FSL_EIS_L1CSR0_CFI
+	mtspr	FSL_EIS_L1CSR0, r3
+1:
+	mfspr	r3, FSL_EIS_L1CSR0
+	andi.	r3, r3, FSL_EIS_L1CSR0_CFI
+	bne	1b
+	isync
+
+	/* Invalidate L1 instruction cache */
+	mfspr	r3, FSL_EIS_L1CSR1
+	ori	r3, r3, FSL_EIS_L1CSR1_ICFI
+	mtspr	FSL_EIS_L1CSR1, r3
+1:
+	mfspr	r3, FSL_EIS_L1CSR1
+	andi.	r3, r3, FSL_EIS_L1CSR1_ICFI
+	bne	1b
+	isync
+
+	blr