[rtems commit] Obsolete and remove m68k/gen68302

Joel Sherrill joel at rtems.org
Sat Jan 23 22:53:03 UTC 2016


Module:    rtems
Branch:    master
Commit:    77990ec71456341463965b756db1a9d671df5611
Changeset: http://git.rtems.org/rtems/commit/?id=77990ec71456341463965b756db1a9d671df5611

Author:    Joel Sherrill <joel at rtems.org>
Date:      Sat Jan 23 16:44:27 2016 -0600

Obsolete and remove m68k/gen68302

closes #2543.

---

 c/ACKNOWLEDGEMENTS                                 |   6 -
 c/src/lib/libbsp/m68k/acinclude.m4                 |   2 -
 c/src/lib/libbsp/m68k/gen68302/Makefile.am         |  60 --
 c/src/lib/libbsp/m68k/gen68302/README              | 150 ----
 c/src/lib/libbsp/m68k/gen68302/bsp_specs           |  13 -
 c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c      | 101 ---
 c/src/lib/libbsp/m68k/gen68302/configure.ac        |  23 -
 c/src/lib/libbsp/m68k/gen68302/console/console.c   | 245 ------
 c/src/lib/libbsp/m68k/gen68302/include/bsp.h       |  72 --
 c/src/lib/libbsp/m68k/gen68302/include/coverhd.h   | 119 ---
 c/src/lib/libbsp/m68k/gen68302/include/m302_int.h  | 542 ------------
 .../libbsp/m68k/gen68302/make/custom/gen68302.cfg  |  19 -
 c/src/lib/libbsp/m68k/gen68302/network/network.c   | 968 ---------------------
 c/src/lib/libbsp/m68k/gen68302/preinstall.am       |  71 --
 c/src/lib/libbsp/m68k/gen68302/start/start.S       | 255 ------
 c/src/lib/libbsp/m68k/gen68302/startup/linkcmds    | 204 -----
 c/src/lib/libbsp/m68k/gen68302/timer/timer.c       | 105 ---
 c/src/lib/libbsp/m68k/gen68302/timer/timerisr.S    |  26 -
 c/src/lib/libbsp/m68k/gen68302/times               | 189 ----
 19 files changed, 3170 deletions(-)

diff --git a/c/ACKNOWLEDGEMENTS b/c/ACKNOWLEDGEMENTS
index 25d4a0b..7590f6c 100644
--- a/c/ACKNOWLEDGEMENTS
+++ b/c/ACKNOWLEDGEMENTS
@@ -25,12 +25,6 @@ The following persons/organizations have made contributions:
   examples in the back of the IDP user's manual, and the libgloss example
   support for the IDP board from the newlib/libgloss distribution.
 
-+ David Glessner (dwg at glenqcy.glenayre.com) of Glenayre Electronics
-  submitted the support for the Motorola MC68302 CPU.  This included 
-  the "gen68302" BSP which uses the on-chip peripherals on the MC68302 
-  as well as the modifications to the m68k dependent executive code to 
-  support m68k family members based on the mc68000 core.
-
 + Bryce Cogswell (cogswell at cs.uoregon.edu) submitted the support for MS-DOS 
   as a development environment as well as djgpp/go32 as a target environment.
 
diff --git a/c/src/lib/libbsp/m68k/acinclude.m4 b/c/src/lib/libbsp/m68k/acinclude.m4
index b755b66..13dc717 100644
--- a/c/src/lib/libbsp/m68k/acinclude.m4
+++ b/c/src/lib/libbsp/m68k/acinclude.m4
@@ -6,8 +6,6 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
     AC_CONFIG_SUBDIRS([av5282]);;
   csb360 )
     AC_CONFIG_SUBDIRS([csb360]);;
-  gen68302 )
-    AC_CONFIG_SUBDIRS([gen68302]);;
   gen68340 )
     AC_CONFIG_SUBDIRS([gen68340]);;
   gen68360 )
diff --git a/c/src/lib/libbsp/m68k/gen68302/Makefile.am b/c/src/lib/libbsp/m68k/gen68302/Makefile.am
deleted file mode 100644
index 65b6319..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/Makefile.am
+++ /dev/null
@@ -1,60 +0,0 @@
-ACLOCAL_AMFLAGS = -I ../../../../aclocal
-
-include $(top_srcdir)/../../../../automake/compile.am
-
-include_bspdir = $(includedir)/bsp
-
-dist_project_lib_DATA = bsp_specs
-
-include_HEADERS = include/bsp.h
-include_HEADERS += ../../shared/include/tm27.h
-
-nodist_include_HEADERS = include/bspopts.h
-nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
-DISTCLEANFILES = include/bspopts.h
-noinst_PROGRAMS =
-
-include_HEADERS += include/coverhd.h
-include_HEADERS += include/m302_int.h
-
-EXTRA_DIST = times
-
-noinst_LIBRARIES = libbspstart.a
-libbspstart_a_SOURCES = start/start.S
-project_lib_DATA = start.$(OBJEXT)
-
-dist_project_lib_DATA += startup/linkcmds
-
-noinst_LIBRARIES += libbsp.a
-libbsp_a_SOURCES =
-
-# startup
-libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
-    ../../shared/bsppredriverhook.c \
-    ../../shared/bsppost.c ../../shared/bspstart.c ../../shared/bootcard.c \
-    ../../shared/bspgetworkarea.c ../../shared/sbrk.c \
-    ../../shared/setvec.c ../../shared/gnatinstallhandler.c
-# clock
-libbsp_a_SOURCES += clock/ckinit.c
-# console
-libbsp_a_SOURCES += console/console.c ../../shared/dummy_printk_support.c
-# timer
-libbsp_a_SOURCES += timer/timer.c timer/timerisr.S
-
-if HAS_NETWORKING
-network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
-noinst_PROGRAMS += network.rel
-network_rel_SOURCES = network/network.c
-network_rel_CPPFLAGS = $(AM_CPPFLAGS) $(network_CPPFLAGS)
-network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-endif
-
-libbsp_a_LIBADD = \
-    ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
-    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
-if HAS_NETWORKING
-libbsp_a_LIBADD += network.rel
-endif
-
-include $(srcdir)/preinstall.am
-include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/m68k/gen68302/README b/c/src/lib/libbsp/m68k/gen68302/README
deleted file mode 100644
index 81a079d..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/README
+++ /dev/null
@@ -1,150 +0,0 @@
-BSP NAME:	    gen68302
-BOARD:              proprietary (see below for relevant information)
-BUS:                none
-CPU FAMILY:         MC68000
-COPROCESSORS:       68302 communications co-processor
-MODE:               not applicable
-
-DEBUG MONITOR:      none
-
-PERIPHERALS
-===========
-TIMERS:             two 68302 timers, one 68302 watchdog timer
-  RESOLUTION:         ?
-SERIAL PORTS:       three 68302 SCCs
-REAL-TIME CLOCK:
-DMA:                built-in 68302, not used
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       68302 (TIMER1)
-IOSUPP DRIVER:      68302 SCC2
-SHMSUPP:            none
-TIMER DRIVER:       68302 TIMER2
-
-STDIO
-=====
-PORT:               ?
-ELECTRICAL:         EIA-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:	16 MHz
-bus width:	16 bits
-ROM:		128 kbyte (flash,  0 wait states, chip select 0)
-RAM:		256 kbyte (static, 0 wait states, chip select 1)
-
-The 68302's built-in DRAM refresh controller circuitry is neither used
-nor configured at startup.
-
-Host System
------------
-HP 9000/715, HP-UX 9.05
-gcc-2.6.3
-binutils-2.5.2
-
-
-Verification
-------------
-The 1-ms clock ISR rate was verified with an in-circuit emulator.
-
-Single processor tests:  
-Multi-processort tests:  not applicable
-Timing tests:            see results in c/src/tests/tmtests/times
-
-Note: The board has 256 kbyte RAM, so the timing tests would not run
-with the standard executive RAM size configuration of 256 K.
-Modifying the conftbl.h files to specify 160 kbyte for workspace
-seemed to work.
-
-* Porting
-
-** Mod c/src/tests/tmtests/*/conftbl.h
-
-Modified to use 160 kbyte for executive RAM size.
-
-** Add	c/make/custom/gen68302.cfg
-
-Based on m68k_no_bsp.cfg.  Turned off multiprocessor support.  Had to
-use a BSP-specific compiler configuration file in order to link the
-proper startup file.
-
-** Mod	c/make/compilers/gcc-m68000.cfg
-
-Added "-m68000" to the AS macro so that non-68000 instructions are
-neither generated nor allowed (remember that the GNU assembler
-supports pseudo-assembler instructions (e.g. jbsr) that will be
-"intelligently" assembled.)  Added "m68000/" before libgcc.a so that
-non-68000 instructions aren't included.
-
-** Add	c/make/compilers/gcc-gen68302.cfg
-
-Based on modified gcc-m68000.cfg.
-
-Changed make-exe define to produce IEEE-695 output files for loading
-into the emulator.
-
-The board has no debug monitor, so I had to create a 68302-specific
-startup file (c/src/lib/libbsp/m68k/gen68302/start302/start302.s) to
-override the c/src/lib/start/m68k/start.s.  START_FILE entry was
-modified to causes start302.s to be linked first (in lieu of start.s).
-
-** Mod	c/src/exec/cpu/m68k/cpu.h
-
-Turned off software and hardware interrupt stack support.  Added
-support in _CPU_Bitfield_Find_first_bit() and
-_CPU_Priority_Bits_index() to replace the bfffo instruction.
-
-TODO: add software-maintained interrupt stack.
-
-TODO: optimize things so that subtracting _priority from 15 isn't
-required in _CPU_Priority_Bits_index().
-
-** Mod	c/src/exec/cpu/m68k/cpu.c
-
-Added the log base 2 table (__log2table) that's required by the BFFFO
-replacement in cpu.h.
-
-** Mod	c/src/exec/cpu/m68k/cpu_asm.s
-
-Added _ISR_Exit that's currently used in TBD....  Added ifdef wrapper
-around ISR exit code that accessed the format nibble.  Added some code
-to restore the status register and call _Thread_Dispatch.
-
-TODO: add software-maintained interrupt stack.
-
-** Mod	c/src/exec/cpu/m68k/m68k.h
-
-Changed "typedef char signed8" to "typedef signed char signed8".
-
-** Add	c/src/lib/libbsp/m68k/gen68302/...
-*** clock/
-
-TODO: Add set_vector support.  Figure out what to do with Clock_exit().
-TODO: Pre-compute (rtems_configuration_get_microseconds_per_tick()/1000) so that
-it doesn't have to be re-computed on each Clock_isr().
-
-*** console/
-
-These files assume SCC2, but it shouldn't be too difficult to re-write
-these to use any of the other SCCs.
-
-*** include/
-*** start302/
-
-This contains the start302.s file that does some fairly tricky memory
-re-mapping so that RAM ends up at 0 and ROM ends up at 0xc00000.
-
-*** startup/
-*** timer/
-*** wrapup/
diff --git a/c/src/lib/libbsp/m68k/gen68302/bsp_specs b/c/src/lib/libbsp/m68k/gen68302/bsp_specs
deleted file mode 100644
index 5154de8..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/bsp_specs
+++ /dev/null
@@ -1,13 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-%rename link old_link
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e start}}
-
-*link:
-%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
-
-*endfile:
-%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c
deleted file mode 100644
index 1e4982e..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/clock/ckinit.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- *  This routine initializes Timer 1 for an MC68302.
- *  The tick frequency is 1 millisecond.
- */
-
-/*
- *  COPYRIGHT (c) 1989-2014.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#include <stdlib.h>			/* for atexit() */
-
-#include <bsp.h>
-#include <rtems/m68k/m68302.h>
-
-#define CLOCK_VECTOR 137
-
-#define TMR1_VAL (  RBIT_TMR_RST	/* software reset the timer */\
-		  | RBIT_TMR_ICLK_MASTER16 /* master clock divided by 16 */\
-		  | RBIT_TMR_FRR	/* restart timer after ref reached */\
-		  | RBIT_TMR_ORI)	/* enable interrupt when ref reached */
-#define TRR1_VAL 1000			/* 1000 ticks @ 16MHz/16
-					 *    = 1 millisecond tick.
-					 */
-
-/*
- *  Clock_driver_ticks is a monotonically increasing counter of the
- *  number of clock ticks since the driver was initialized.
- */
-volatile uint32_t         Clock_driver_ticks;
-
-/*
- *  Clock_isrs is the number of clock ISRs until the next invocation of
- *  the RTEMS clock tick routine.  The clock tick device driver
- *  gets an interrupt once a millisecond and counts down until the
- *  length of time between the user configured microseconds per tick
- *  has passed.
- */
-uint32_t         Clock_isrs;
-
-void Clock_exit( void );
-
-/*
- *  ISR Handler
- */
-static rtems_isr Clock_isr(
-  rtems_vector_number vector
-)
-{
-  Clock_driver_ticks += 1;
-
-  m302.reg.isr  = RBIT_ISR_TIMER1;	/* clear in-service bit */
-  m302.reg.ter1 = (RBIT_TER_REF | RBIT_TER_CAP); /* clear timer intr request */
-
-  if ( Clock_isrs == 1 ) {
-    rtems_clock_tick();
-    Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
-  }
-  else
-    Clock_isrs -= 1;
-}
-
-static void Install_clock(
-  rtems_isr_entry clock_isr
-)
-{
-  Clock_driver_ticks = 0;
-  Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
-
-  set_vector( clock_isr, CLOCK_VECTOR, 1 );
-
-  m302.reg.trr1 = TRR1_VAL;		/* set timer reference register */
-  m302.reg.tmr1 = TMR1_VAL;		/* set timer mode register & enable */
-  /*
-   * Enable TIMER1 interrupts only.
-   */
-  m302.reg.imr |= RBIT_IMR_TIMER1;	/* set 68302 int-mask to allow ints */
-
-  atexit( Clock_exit );
-}
-
-void Clock_exit( void )
-{
-  /* TODO: figure out what to do here */
-  /* do not restore old vector */
-}
-
-rtems_device_driver Clock_initialize(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void *pargp
-)
-{
-  Install_clock( Clock_isr );
-
-  return RTEMS_SUCCESSFUL;
-}
diff --git a/c/src/lib/libbsp/m68k/gen68302/configure.ac b/c/src/lib/libbsp/m68k/gen68302/configure.ac
deleted file mode 100644
index 29c7763..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/configure.ac
+++ /dev/null
@@ -1,23 +0,0 @@
-## Process this file with autoconf to produce a configure script.
-
-AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-m68k-gen68302],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
-AC_CONFIG_SRCDIR([bsp_specs])
-RTEMS_TOP(../../../../../..)
-
-RTEMS_CANONICAL_TARGET_CPU
-AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
-RTEMS_BSP_CONFIGURE
-
-RTEMS_PROG_CC_FOR_TARGET
-RTEMS_CANONICALIZE_TOOLS
-RTEMS_PROG_CCAS
-
-RTEMS_CHECK_NETWORKING
-AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
-
-RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
-
-# Explicitly list all Makefiles here
-AC_CONFIG_FILES([Makefile])
-AC_OUTPUT
diff --git a/c/src/lib/libbsp/m68k/gen68302/console/console.c b/c/src/lib/libbsp/m68k/gen68302/console/console.c
deleted file mode 100644
index 3d73b24..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/console/console.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * Initialize the MC68302 SCC2 for console IO board support package.
- */
-
-/*
- *  COPYRIGHT (c) 1989-2014.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#define GEN68302_INIT
-
-#include <bsp.h>
-#include <rtems/libio.h>
-
-#include <rtems/m68k/m68302.h>
-
-/*  console_initialize
- *
- *  This routine initializes the console IO driver.
- */
-rtems_device_driver console_initialize(
-  rtems_device_major_number  major,
-  rtems_device_minor_number  minor,
-  void                      *arg
-)
-{
-  rtems_status_code status;
-  volatile m302_dualPortRAM_t *p = &m302;
-
-  p->reg.pacnt |= 0x0003;		/* enable RXD2 and TXD2 signals */
-  /*
-   * TODO: Check assembly code.  I think gcc's volatile semantics force
-   * this to not use a CLR.
-   */
-  p->reg.simode = 0;			/* NMSI mode */
-
-  p->reg.scc[1].scon = 0x00d8;		/* 9600 baud */
-  p->reg.scc[1].scm  = 0x01b1;
-
-  p->scc2.parm.rfcr = 0x50;		/* Rx buffers in supervisor data */
-  p->scc2.parm.tfcr = 0x50;		/* Tx buffers in supervisor data */
-  p->scc2.parm.mrblr = 0x0001;		/* Max Rx buffer length is 1 byte */
-
-  p->scc2.prot.uart.max_idl = 0x0000;	/* 0 = maximum timeout value */
-  p->scc2.prot.uart.brkcr = 0x0001;	/* send 1 break char on STOP TX cmd */
-  p->scc2.prot.uart.parec = 0x0000;	/* reset parity error counter */
-  p->scc2.prot.uart.frmec = 0x0000;	/* reset framing error counter */
-  p->scc2.prot.uart.nosec = 0x0000;	/* reset noise error counter */
-  p->scc2.prot.uart.brkec = 0x0000;	/* reset break condition counter */
-
-  p->scc2.prot.uart.character[0] = 0x0003; /* use <ctrl>c as control char */
-  p->scc2.prot.uart.character[1] = 0x8000; /* set end of cntrl char table */
-
-  p->scc2.bd.rx[0].status = 0xA000;	/* RxBD0 empty, wrap, no intr */
-  p->scc2.bd.rx[0].length = 0x0000;
-  p->scc2.bd.rx[0].buffer =
-      (uint8_t*) &m302.scc2.bd.rx[1]; /* RxBD1 is Rx buffer */
-
-  p->reg.scc[1].dsr = 0x7000;		/* set full-length last stop bit */
-
-  p->scc2.bd.tx[0].status = 0x3000;	/* TxBD0 not ready, wrap, intr */
-  p->scc2.bd.tx[0].length = 0x0001;
-  p->scc2.bd.tx[0].buffer =
-      (uint8_t*) &m302.scc2.bd.tx[1]; /* TxBD1 is Tx buffer */
-
-  p->reg.scc[1].scce = 0xFF;		/* clear all SCC event flags */
-  p->reg.scc[1].sccm = 0x03;		/* enable only Tx & Rx interrupts */
-  p->reg.scc[1].scm  = 0x01BD;
-
-  status = rtems_io_register_name(
-    "/dev/console",
-    major,
-    (rtems_device_minor_number) 0
-  );
-
-  if (status != RTEMS_SUCCESSFUL)
-    rtems_fatal_error_occurred(status);
-
-  return RTEMS_SUCCESSFUL;
-
-}
-
-/*  inbyte
- *
- *  Receive a character from the MC68302's SCC2.
- */
-static char inbyte( void )
-{
-  char ch;
-
-#define RXS (m302.scc2.bd.rx[0].status)
-#define RXD (* ((volatile char *) m302.scc2.bd.rx[0].buffer))
-
-  do {
-    while (RXS & RBIT_HDLC_EMPTY_BIT)
-      /* Wait until character received */ ;
-
-    ch = RXD;
-    RXS = RBIT_HDLC_EMPTY_BIT | RBIT_HDLC_WRAP_BIT;
-
-    if (ch == '\r' || ch == '\n')
-      break;
-  } while (ch < ' ' ||  ch > '~');
-
-  return ch;
-}
-
-/*  outbyte
- *
- *  Transmit a character out on the MC68302's SCC2.
- *  It may support XON/XOFF flow control.
- */
-static void outbyte(
-  char ch
-)
-{
-#define TXS (m302.scc2.bd.tx[0].status)
-#define TXD (* ((volatile char *) m302.scc2.bd.tx[0].buffer))
-
-#define RXS (m302.scc2.bd.rx[0].status)
-#define RXD (* ((volatile char *) m302.scc2.bd.rx[0].buffer))
-
-  while (TXS & RBIT_HDLC_READY_BIT)
-    /* Wait until okay to transmit */ ;
-
-    /*
-     * Check for flow control requests and process.
-     */
-    while ( ! (RXS & RBIT_HDLC_EMPTY_BIT)) {
-      if (RXD == XOFF) {
-	do {
-	  RXS = RBIT_HDLC_EMPTY_BIT | RBIT_HDLC_WRAP_BIT;
-	  while (RXS & RBIT_HDLC_EMPTY_BIT)
-	    /* Wait until character received */ ;
-	} while (RXD != XON);
-	RXS = RBIT_HDLC_EMPTY_BIT | RBIT_HDLC_WRAP_BIT;
-      }
-    }
-
-    TXD = ch;
-    TXS = RBIT_HDLC_READY_BIT | RBIT_HDLC_WRAP_BIT;
-    if (ch == '\n')
-      outbyte('\r');
-}
-
-/*
- *  Open entry point
- */
-rtems_device_driver console_open(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void                    * arg
-)
-{
-  return RTEMS_SUCCESSFUL;
-}
-
-/*
- *  Close entry point
- */
-rtems_device_driver console_close(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void                    * arg
-)
-{
-  return RTEMS_SUCCESSFUL;
-}
-
-/*
- * read bytes from the serial port. We only have stdin.
- */
-rtems_device_driver console_read(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void                    * arg
-)
-{
-  rtems_libio_rw_args_t *rw_args;
-  char *buffer;
-  int maximum;
-  int count = 0;
-
-  rw_args = (rtems_libio_rw_args_t *) arg;
-
-  buffer = rw_args->buffer;
-  maximum = rw_args->count;
-
-  for (count = 0; count < maximum; count++) {
-    buffer[ count ] = inbyte();
-    if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
-      buffer[ count++ ]  = '\n';
-      break;
-    }
-  }
-
-  rw_args->bytes_moved = count;
-  return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
-}
-
-/*
- * write bytes to the serial port. Stdout and stderr are the same.
- */
-rtems_device_driver console_write(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void                    * arg
-)
-{
-  int count;
-  int maximum;
-  rtems_libio_rw_args_t *rw_args;
-  char *buffer;
-
-  rw_args = (rtems_libio_rw_args_t *) arg;
-
-  buffer = rw_args->buffer;
-  maximum = rw_args->count;
-
-  for (count = 0; count < maximum; count++) {
-    if ( buffer[ count ] == '\n') {
-      outbyte('\r');
-    }
-    outbyte( buffer[ count ] );
-  }
-
-  rw_args->bytes_moved = maximum;
-  return 0;
-}
-
-/*
- *  IO Control entry point
- */
-rtems_device_driver console_control(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void                    * arg
-)
-{
-  return RTEMS_SUCCESSFUL;
-}
diff --git a/c/src/lib/libbsp/m68k/gen68302/include/bsp.h b/c/src/lib/libbsp/m68k/gen68302/include/bsp.h
deleted file mode 100644
index 3cf37f6..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/include/bsp.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/**
- * @file
- *
- * @ingroup m68k_gen68302
- *
- * @brief Global BSP definitions.
- */
-
-/*
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_M68K_GEN68302_BSP_H
-#define LIBBSP_M68K_GEN68302_BSP_H
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#include <rtems.h>
-#include <rtems/console.h>
-#include <rtems/iosupp.h>
-#include <rtems/clockdrv.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup m68k_gen68302 GEN68302 Support
- *
- * @ingroup bsp_m68k
- *
- * @brief GEN68302 support.
- */
-
-/* Constants */
-
-#define RAM_START 0
-#define RAM_END   0x040000
-
-/* Structures */
-
-#ifdef GEN68302_INIT
-#undef EXTERN
-#define EXTERN
-#else
-#undef EXTERN
-#define EXTERN extern
-#endif
-
-/* miscellaneous stuff assumed to exist */
-
-extern rtems_isr_entry M68Kvec[];   /* vector table address */
-
-/* functions */
-
-rtems_isr_entry set_vector(
-  rtems_isr_entry     handler,
-  rtems_vector_number vector,
-  int                 type
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/m68k/gen68302/include/coverhd.h b/c/src/lib/libbsp/m68k/gen68302/include/coverhd.h
deleted file mode 100644
index 65d586c..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/include/coverhd.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/**
- * @file
- *
- * @ingroup m68k_gen68302
- *
- * @brief C overhead definitions.
- */
-
-/*  coverhd.h
- *
- *  This include file has defines to represent the overhead associated
- *  with calling a particular directive from C.  These are used in the
- *  Timing Test Suite to ignore the overhead required to pass arguments
- *  to directives.  On some CPUs and/or target boards, this overhead
- *  is significant and makes it difficult to distinguish internal
- *  RTEMS execution time from that used to call the directive.
- *  This file should be updated after running the C overhead timing
- *  test.  Once this update has been performed, the RTEMS Time Test
- *  Suite should be rebuilt to account for these overhead times in the
- *  timing results.
- *
- *  NOTE:  If these are all zero, then the times reported include
- *         all calling overhead including passing of arguments.
- *
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef __COVERHD_h
-#define __COVERHD_h
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      14
-#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        11
-#define CALLING_OVERHEAD_TASK_CREATE               22
-#define CALLING_OVERHEAD_TASK_IDENT                17
-#define CALLING_OVERHEAD_TASK_START                18
-#define CALLING_OVERHEAD_TASK_RESTART              15
-#define CALLING_OVERHEAD_TASK_DELETE               12
-#define CALLING_OVERHEAD_TASK_SUSPEND              12
-#define CALLING_OVERHEAD_TASK_RESUME               12
-#define CALLING_OVERHEAD_TASK_SET_PRIORITY         16
-#define CALLING_OVERHEAD_TASK_MODE                 15
-#define CALLING_OVERHEAD_TASK_GET_NOTE             16
-#define CALLING_OVERHEAD_TASK_SET_NOTE             16
-#define CALLING_OVERHEAD_TASK_WAKE_WHEN            31
-#define CALLING_OVERHEAD_TASK_WAKE_AFTER           11
-#define CALLING_OVERHEAD_INTERRUPT_CATCH           17
-#define CALLING_OVERHEAD_CLOCK_GET                 32
-#define CALLING_OVERHEAD_CLOCK_SET                 31
-#define CALLING_OVERHEAD_CLOCK_TICK                8
-
-#define CALLING_OVERHEAD_TIMER_CREATE              13
-#define CALLING_OVERHEAD_TIMER_IDENT               12
-#define CALLING_OVERHEAD_TIMER_DELETE              14
-#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          19
-#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           39
-#define CALLING_OVERHEAD_TIMER_RESET               12
-#define CALLING_OVERHEAD_TIMER_CANCEL              12
-#define CALLING_OVERHEAD_SEMAPHORE_CREATE          18
-#define CALLING_OVERHEAD_SEMAPHORE_IDENT           12
-#define CALLING_OVERHEAD_SEMAPHORE_DELETE          17
-#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          17
-#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         12
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      18
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       17
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      12
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        14
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      14
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   17
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     19
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       14
-
-#define CALLING_OVERHEAD_EVENT_SEND                15
-#define CALLING_OVERHEAD_EVENT_RECEIVE             18
-#define CALLING_OVERHEAD_SIGNAL_CATCH              14
-#define CALLING_OVERHEAD_SIGNAL_SEND               14
-#define CALLING_OVERHEAD_PARTITION_CREATE          23
-#define CALLING_OVERHEAD_PARTITION_IDENT           17
-#define CALLING_OVERHEAD_PARTITION_DELETE          12
-#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      15
-#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   15
-#define CALLING_OVERHEAD_REGION_CREATE             23
-#define CALLING_OVERHEAD_REGION_IDENT              14
-#define CALLING_OVERHEAD_REGION_DELETE             12
-#define CALLING_OVERHEAD_REGION_GET_SEGMENT        21
-#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     15
-#define CALLING_OVERHEAD_PORT_CREATE               20
-#define CALLING_OVERHEAD_PORT_IDENT                14
-#define CALLING_OVERHEAD_PORT_DELETE               12
-#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 18
-#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 18
-
-#define CALLING_OVERHEAD_IO_INITIALIZE             18
-#define CALLING_OVERHEAD_IO_OPEN                   18
-#define CALLING_OVERHEAD_IO_CLOSE                  18
-#define CALLING_OVERHEAD_IO_READ                   18
-#define CALLING_OVERHEAD_IO_WRITE                  18
-#define CALLING_OVERHEAD_IO_CONTROL                18
-#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      11
-#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     13
-#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      14
-#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     12
-#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     12
-#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     14
-#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  8
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h b/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h
deleted file mode 100644
index 3634787..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h
+++ /dev/null
@@ -1,542 +0,0 @@
-/**
- * @file
- *
- * @ingroup m68k_gen68302
- *
- * @brief Motorola 68302 definitions.
- */
-
-/*
- *  Implements the Motorola 68302 multi-protocol chip parameter
- *  definition header.
- */
-
-#ifndef __M302_INT_h
-#define __M302_INT_h
-
-#ifndef uchar
-#define uchar unsigned char
-#endif
-#ifndef ushort
-#define ushort unsigned short
-#endif
-#ifndef ulong
-#define ulong unsigned long
-#endif
-
-/* Ethernet Control Register ECNTRL */
-#define ECNTRL_BIT_RESET    0x0001
-#define ECNTRL_BIT_ETHER_EN  0x0002
-#define ECNTRL_BIT_GTS      0x0004
-
-/* Ethernet DMA Configuration Status Register EDMA */
-#define EDMA_BDERR_MASK      0xFE00
-
-#define EDMA_BDSIZE_MASK      0x00C0
-#define EDMA_BDSIZE_8T_120R    0x0000
-#define EDMA_BDSIZE_16T_112R  0x0040
-#define EDMA_BDSIZE_32T_96R    0x0080
-#define EDMA_BDSIZE_64T_64R    0x00C0
-
-#define EDMA_BIT_TSRLY      0x0020
-
-#define EDMA_WMRK_MASK      0x0018
-#define EDMA_WMRK_8FIFO      0x0000
-#define EDMA_WMRK_16FIFO    0x0008
-#define EDMA_WMRK_24FIFO    0x0010
-#define EDMA_WMRK_32FIFO    0x0018
-
-#define EDMA_BLIM_MASK      0x0007
-#define EDMA_BLIM_8ACCESS    0x0003
-
-/* Ethernet Maximum Receive Buffer Length EMRBLR */
-#define EMRBLR_MASK          0x07FFE
-
-/* Interrupt Vector Register IVEC */
-#define IVEC_BIT_VG          0x0100
-#define IVEC_INV_MASK        0x00FF
-
-/* Interrupt Event Register INTR_EVENT */
-#define INTR_EVENT_BIT_RXB      0x0001
-#define INTR_EVENT_BIT_TXB      0x0002
-#define INTR_EVENT_BIT_BSY      0x0004
-#define INTR_EVENT_BIT_RFINT    0x0008
-#define INTR_EVENT_BIT_TFINT    0x0010
-#define INTR_EVENT_BIT_EBERR    0x0020
-#define INTR_EVENT_BIT_BOD      0x0040
-#define INTR_EVENT_BIT_GRA      0x0080
-#define INTR_EVENT_BIT_BABT      0x0100
-#define INTR_EVENT_BIT_BABR      0x0200
-#define INTR_EVENT_BIT_HBERR    0x0400
-
-/* Interrupt Mask Register INTR_MASK */
-#define INTR_MASK_BIT_RXIEN      0x0001
-#define INTR_MASK_BIT_TXIEN      0x0002
-#define INTR_MASK_BIT_BSYEN      0x0004
-#define INTR_MASK_BIT_RFIEN      0x0008
-#define INTR_MASK_BIT_TFIEN      0x0010
-#define INTR_MASK_BIT_EBERREN    0x0020
-#define INTR_MASK_BIT_BODEN      0x0040
-#define INTR_MASK_BIT_GRAEN      0x0080
-#define INTR_MASK_BIT_BTEN      0x0100
-#define INTR_MASK_BIT_BREN      0x0200
-#define INTR_MASK_BIT_HBEEN      0x0400
-
-/* Ethernet Configuration ECNFIG */
-#define ECNFIG_BIT_LOOP          0x0001
-#define ECNFIG_BIT_FDEN          0x0002
-#define ECNFIG_BIT_HBC          0x0004
-#define ECNFIG_BIT_RDT          0x0008
-
-/* Ethernet Test ETHER_TEST */
-#define ETHER_TEST_BIT_TWS      0x0001
-#define ETHER_TEST_BIT_RWS      0x0002
-#define ETHER_TEST_BIT_DRTY      0x0004
-#define ETHER_TEST_BIT_COLL      0x0008
-#define ETHER_TEST_BIT_SLOT      0x0010
-#define ETHER_TEST_BIT_TRND      0x0020
-#define ETHER_TEST_BIT_TBO      0x0040
-#define ETHER_TEST_BIT_RNGT      0x0080
-#define ETHER_TEST_REV_MASK      0xF000
-
-/* Ethernet AR Control Registere AR_CNTRL */
-#define AR_CNTRL_BIT_PROM        0x0400
-#define AR_CNTRL_BIT_PA_REJ      0x0800
-#define AR_CNTRL_BIT_NO_BROADCAST  0x1000
-#define AR_CNTRL_BIT_MULTI1      0x2000
-#define AR_CNTRL_BIT_INDEX_EN    0x4000
-#define AR_CNTRL_BIT_HASH_EN    0x8000
-
-#define AR_CNTRL_MULTI_MASK      (AR_CNTRL_BIT_MULTI0 | AR_CNTRL_BIT_MULTI1)
-
-/* Ethernet buffer Status TX */
-#define BUF_STAT_CARRIER_LOST    0x0001
-#define BUF_STAT_UNDERRUN        0x0002
-#define BUF_STAT_RETRANS_COUNT  0x003C
-#define BUF_STAT_RETRY_LIMIT    0x0040
-#define BUF_STAT_LATE_COLLISION  0x0080
-#define BUF_STAT_HEARTBIT        0x0100
-#define BUF_STAT_DEFER          0x0200
-#define BUF_STAT_TX_CRC          0x0400
-#define BUF_STAT_LAST            0x0800
-#define BUF_STAT_INTERRUPT      0x1000
-#define BUF_STAT_WRAP            0x2000
-#define BUF_STAT_TO              0x4000
-#define BUF_STAT_READY          0x8000
-
-/* Ethernet buffer Status RX */
-#define BUF_STAT_COLLISION      0x0001
-#define BUF_STAT_OVERRUN        0x0002
-#define BUF_STAT_CRC_ERROR      0x0004
-#define BUF_STAT_SHORT          0x0008
-#define BUF_STAT_NONALIGNED      0x0010
-#define BUF_STAT_LONG            0x0020
-#define BUF_STAT_FIRST_IN_FRAME  0x0400
-#define BUF_STAT_EMPTY          0x8000
-
-  /* SCC Buffer Descriptor structure
-  ----------------------------------*/
-
-struct m68302_scc_bd {
-  ushort      stat_ctrl;
-  ushort      data_lgth;
-  uchar      *p_buffer;
-};
-
-#define M68302_scc_bd_stat_ctrl(p) \
-    (((struct m68302_scc_bd *)(p)) -> stat_ctrl)
-#define M68302_scc_bd_data_lgth(p) \
-    (((struct m68302_scc_bd *)(p)) -> data_lgth)
-#define M68302_scc_bd_p_buffer(p)  \
-   (((struct m68302_scc_bd *)(p)) -> p_buffer)
-
-struct m68302_imp {
-
-/* BASE : user data memory  */
-
-  uchar  user_data[0x240];        /* 0x240 bytes user data */
-  uchar  user_reserved[0x1c0];    /* empty till 0x400 */
-
-/* BASE + 400H: PARAMETER RAM */
-  struct {
-    struct m68302_scc_bd scc_bd_rx[8];  /* Rx buffer descriptors */
-    struct m68302_scc_bd scc_bd_tx[8];  /* Tx buffer descriptors */
-
-    uchar      rfcr;        /* Rx function code */
-    uchar      tfcr;        /* Tx function code */
-    ushort     mrblr;        /* maximum Rx buffer length */
-    ushort     rist;        /* internal state */
-    uchar      res1;
-    uchar      rbdn;        /* Rx internal buffer number */
-    ulong      ridp;
-    ushort     ribc;
-    ushort     rtmp;
-    ushort     tist;
-    uchar      res2;
-    uchar      tbdn;        /* Tx internal buffer number */
-    ulong      tidp;
-    ushort     tibc;
-    ushort     ttmp;
-
-    unsigned char  scc_spp  [0x64];    /* SCC specific parameters */
-  } parm_ram [3];
-
-  uchar reserved_1 [0x100];
-
-/* BASE + 800H: INTERNAL REGISTERS */
-
-    /* DMA */
-
-  ushort  dma_res1;           /* reserved */
-  ushort  dma_mode;           /* dma mode reg */
-  ulong   dma_src;            /* dma source */
-  ulong   dma_dest;           /* dma destination */
-  ushort  dma_count;          /* dma byte count */
-  uchar   dma_status;         /* dma status */
-  uchar   dma_res2;           /* reserved */
-  uchar   dma_fct_code;       /* dma function code */
-  uchar   dma_res3;           /* reserved */
-
-    /* Interrupt Controller */
-
-  ushort  it_mode;            /* interrupt mode register */
-  ushort  it_pending;         /* interrupt pending register */
-  ushort  it_mask;            /* interrupt mask register */
-  ushort  it_inservice;       /* interrupt in service register */
-  ulong   it_reserved;        /* reserved */
-
-    /* Parallel I/O */
-
-  struct {
-    ushort  control;         /* port control register */
-    ushort  direction;       /* port data direction register */
-    ushort  data;            /* port data value register */
-  } port[2];
-
-  ushort  p_reserved;        /* reserved */
-
-    /* Chip Select */
-
-  ulong  cs_reserved;
-
-  struct {
-    ushort  base;            /* chip select base register */
-    ushort  option;          /* chip select option register */
-  } cs[4];
-
-    /* Timer */
-
-  ushort  t1_mode;             /* timer 1 mode register */
-  ushort  t1_reference;        /* timer 1 reference register */
-  ushort  t1_capture;          /* timer 1 capture register */
-  ushort  t1_counter;          /* timer 1 counter */
-  uchar   tim_res1;            /* reserved */
-  uchar   t1_event;            /* timer 1 event */
-
-  ushort  t3_reference;        /* timer 3 reference register */
-  ushort  t3_counter;          /* timer 3 counter */
-  ushort  tim_res2;            /* reserved */
-
-  ushort  t2_mode;              /* timer 2 mode register */
-  ushort  t2_reference;         /* timer 2 reference register */
-  ushort  t2_capture;           /* timer 2 capture register */
-  ushort  t2_counter;           /* timer 2 counter */
-  uchar   tim_res3;             /* reserved */
-  uchar   t2_event;             /* timer 2 event */
-  ushort  tim_res4[3];          /* reserved */
-
-    /* command register */
-
-  uchar  cp_cmd;                /* communication processor command register */
-  uchar  cp_cmd_res;            /* reserved */
-
-    /* reserved */
-
-  uchar  reserved_2[0x1e];
-
-    /* SCC registers */
-
-  struct scc_regs {
-    ushort  resvd;           /* reserved */
-    ushort  scon;            /* SCC configuration register */
-    ushort  scm;             /* SCC mode register */
-    ushort  dsr;             /* SCC sync register */
-    uchar   scce;            /* SCC event register */
-    uchar   res1;            /* reserved */
-    uchar   sccm;            /* SCC mask register */
-    uchar   res2;            /* reserved */
-    uchar   sccs;            /* SCC status register */
-    uchar   res3;            /* reserved */
-    ushort  res4;            /* reserved */
-  } scc_regs[3];
-
-    /* SP (SCP + SMI) */
-
-  ushort  scc_mode_reg;          /* scp, smi mode + clock control */
-
-    /* Serial Interface */
-
-  ushort  serial_int_mask;        /* mask register */
-  ushort  serial_int_mode;        /* mode register */
-
-    /* reserved */
-
-  uchar  reserved_3[0x74A];
-
-/****************** 68 EN 302 specific registers **********************/
-/** only available here if
-    M68302_INTERNAL_RAM_BASE_ADD+0x1000=M68EN302_INTERNAL_RAM_BASE_ADD*/
-
-    /* Module Bus Control Registers */
-
-  ushort  mbc;              /* module bus control register MBC */
-  ushort  ier;              /* interrupt extension register IER */
-  ushort  cser[4];          /* Chip Select extension registers CSERx */
-  ushort  pcsr;             /* parity control & status register PCSR */
-
-  ushort  mbc_reserved;
-
-    /* DRAM Controller Registers */
-
-  ushort  dcr;              /* DRAM Configuration register DCR */
-  ushort  drfrsh;           /* DRAM Refresh register DRFRSH */
-  ushort  dba[2];           /* DRAM Bank Base Address Register */
-
-  uchar  dram_reserved[0x7E8];
-
-    /* Ethernet Controller Registers */
-
-  ushort  ecntrl;            /* Ethernet Control Register */
-  ushort  edma;              /* Ethernet DMA Configuration Register */
-  ushort  emrblr;            /* Ethernet Max receive buffer length */
-  ushort  intr_vect;         /* Interruppt vector register */
-  ushort  intr_event;        /* Interruppt event register */
-  ushort  intr_mask;         /* Interruppt mask register */
-  ushort  ecnfig;            /* Ethernet Configuration */
-  ushort  ether_test;        /* Ethernet Test register */
-  ushort  ar_cntrl;          /* Address Recognition Control register */
-
-  uchar  eth_reserved[0x1EE];
-
-  uchar  cet[0x200];                  /* CAM Entry Table */
-  struct m68302_scc_bd eth_bd[128];   /* Ethernet Buffer Descriptors Table */
-
-};
-
-#define M68302imp_     a_m68302_imp ->
-
-#define M68302imp_a_scc_bd_rx(scc,bd) \
-     (struct m68302_scc_bd FAR *)(&(M68302imp_ parm_ram[scc].scc_bd_rx[bd]))
-#define M68302imp_a_scc_bd_tx(scc,bd) \
-     (struct m68302_scc_bd FAR *)(&(M68302imp_ parm_ram[scc].scc_bd_tx[bd]))
-
-#define M68302imp_scc_rfcr(scc)      (M68302imp_ parm_ram[scc].rfcr)
-#define M68302imp_scc_tfcr(scc)      (M68302imp_ parm_ram[scc].tfcr)
-#define M68302imp_scc_mrblr(scc)     (M68302imp_ parm_ram[scc].mrblr)
-#define M68302imp_scc_rbdn(scc)      (M68302imp_ parm_ram[scc].rbdn)
-#define M68302imp_scc_tbdn(scc)      (M68302imp_ parm_ram[scc].tbdn)
-
-#define M68302imp_a_scc_spp(scc)    ((struct m68302_scc_spp FAR *)(M68302imp_ parm_ram[scc].scc_spp))
-
-#define M68302imp_dma_res1        (M68302imp_ dma_res1)
-#define M68302imp_dma_mode        (M68302imp_ dma_mode)
-#define M68302imp_dma_src         (M68302imp_ dma_src)
-#define M68302imp_dma_dest        (M68302imp_ dma_dest)
-#define M68302imp_dma_count       (M68302imp_ dma_count)
-#define M68302imp_dma_status      (M68302imp_ dma_status)
-#define M68302imp_dma_fct_code    (M68302imp_ dma_fct_code)
-
-#define M68302imp_it_mode         (M68302imp_ it_mode)
-#define M68302imp_it_pending      (M68302imp_ it_pending)
-#define M68302imp_it_mask         (M68302imp_ it_mask)
-#define M68302imp_it_inservice    (M68302imp_ it_inservice)
-
-#define M68302imp_cs_base(i)      (M68302imp_ cs[i].base)
-#define M68302imp_cs_option(i)    (M68302imp_ cs[i].option)
-
-#define M68302imp_port_control(i)    (M68302imp_ port[i].control)
-#define M68302imp_port_direction(i)  (M68302imp_ port[i].direction)
-#define M68302imp_port_data(i)       (M68302imp_ port[i].data)
-
-#define M68302imp_timer1_mode        (M68302imp_ t1_mode)
-#define M68302imp_timer1_reference   (M68302imp_ t1_reference)
-#define M68302imp_timer1_capture     (M68302imp_ t1_capture)
-#define M68302imp_timer1_counter     (M68302imp_ t1_counter)
-#define M68302imp_timer1_event       (M68302imp_ t1_event)
-#define M68302imp_timer3_reference   (M68302imp_ t3_reference)
-#define M68302imp_timer3_counter     (M68302imp_ t3_counter)
-#define M68302imp_timer2_mode        (M68302imp_ t2_mode)
-#define M68302imp_timer2_reference   (M68302imp_ t2_reference)
-#define M68302imp_timer2_capture     (M68302imp_ t2_capture)
-#define M68302imp_timer2_counter     (M68302imp_ t2_counter)
-#define M68302imp_timer2_event       (M68302imp_ t2_event)
-
-#define M68302imp_cp_cmd             (M68302imp_ cp_cmd)
-
-#define M68302imp_scc_mode_reg       (M68302imp_ scc_mode_reg)
-
-#define M68302imp_serial_int_mask    (M68302imp_ serial_int_mask)
-#define M68302imp_serial_int_mode    (M68302imp_ serial_int_mode)
-#define M68302imp_simask             (M68302imp_serial_int_mask)
-#define M68302imp_simode             (M68302imp_serial_int_mode)
-
-#define M68302imp_scon(i)            (M68302imp_ scc_regs[i].scon)
-#define M68302imp_scm(i)             (M68302imp_ scc_regs[i].scm)
-#define M68302imp_dsr(i)             (M68302imp_ scc_regs[i].dsr)
-#define M68302imp_scce(i)            (M68302imp_ scc_regs[i].scce)
-#define M68302imp_sccm(i)            (M68302imp_ scc_regs[i].sccm)
-#define M68302imp_sccs(i)            (M68302imp_ scc_regs[i].sccs)
-
-/*----------------------------------------------------------------------------*/
-
-#define M68en302imp_mbc              (M68302imp_ mbc)
-#define M68en302imp_ier              (M68302imp_ ier)
-#define M68en302imp_cser(i)          (M68302imp_ cser[i])
-#define M68en302imp_pcsr             (M68302imp_ pcsr)
-
-#define M68en302imp_dcr              (M68302imp_ dcr)
-#define M68en302imp_drfrsh           (M68302imp_ drfrsh)
-#define M68en302imp_dba(i)           (M68302imp_ dba[i])
-
-#define M68en302imp_ecntrl           (M68302imp_ ecntrl)
-#define M68en302imp_edma             (M68302imp_ edma)
-#define M68en302imp_emrblr           (M68302imp_ emrblr)
-#define M68en302imp_intr_vect        (M68302imp_ intr_vect)
-#define M68en302imp_intr_event       (M68302imp_ intr_event)
-#define M68en302imp_intr_mask        (M68302imp_ intr_mask)
-#define M68en302imp_ecnfig           (M68302imp_ ecnfig)
-#define M68en302imp_ether_test       (M68302imp_ ether_test)
-#define M68en302imp_ar_cntrl         (M68302imp_ ar_cntrl)
-
-#define M68en302imp_cet              (M68302imp_ cet)
-
-#define M68302imp_a_eth_bd(bd) \
-    (struct m68302_scc_bd *)(&(M68302imp_ eth_bd[bd]))
-
-/* PORTS */
-
-#define PA0     0x0001    /* PORT A bit 0 */
-#define PA1     0x0002    /* PORT A bit 1 */
-#define PA2     0x0004    /* PORT A bit 2 */
-#define PA3     0x0008    /* PORT A bit 3 */
-#define PA4     0x0010    /* PORT A bit 4 */
-#define PA5     0x0020    /* PORT A bit 5 */
-#define PA6     0x0040    /* PORT A bit 6 */
-#define PA7     0x0080    /* PORT A bit 7 */
-#define PA8     0x0100    /* PORT A bit 8 */
-#define PA9     0x0200    /* PORT A bit 9 */
-#define PA10    0x0400    /* PORT A bit 10 */
-#define PA11    0x0800    /* PORT A bit 11 */
-#define PA12    0x1000    /* PORT A bit 12 */
-#define PA13    0x2000    /* PORT A bit 13 */
-#define PA14    0x4000    /* PORT A bit 14 */
-#define PA15    0x8000    /* PORT A bit 15 */
-
-#define PB0     0x0001    /* PORT B bit 0 */
-#define PB1     0x0002    /* PORT B bit 1 */
-#define PB2     0x0004    /* PORT B bit 2 */
-#define PB3     0x0008    /* PORT B bit 3 */
-#define PB4     0x0010    /* PORT B bit 4 */
-#define PB5     0x0020    /* PORT B bit 5 */
-#define PB6     0x0040    /* PORT B bit 6 */
-#define PB7     0x0080    /* PORT B bit 7 */
-#define PB8     0x0100    /* PORT B bit 8 */
-#define PB9     0x0200    /* PORT B bit 9 */
-#define PB10    0x0400    /* PORT B bit 10 */
-
-#define PB11    0x0800    /* PORT B bit 11 */
-
-/* MODULE BUS CONTROL (MBCTL) */
-
-#define MBC_BCE   0x8000
-#define MBC_MFC2  0x4000
-#define MBC_MFC1  0x2000
-#define MBC_MFC0  0x1000
-#define MBC_BB    0x0800
-#define MBC_PPE   0x0400
-#define MBC_PM9   0x0200
-#define MBC_PM8   0x0100
-#define MBC_PM7   0x0080
-#define MBC_PM6   0x0040
-#define MBC_PM5   0x0020
-#define MBC_PM4   0x0010
-#define MBC_PM3   0x0008
-#define MBC_PM2   0x0004
-#define MBC_PM1   0x0002
-#define MBC_PM0   0x0001
-
-  /* DRAM CONFIGURATION REG (DCR) */
-
-#define DCR_SU0   0x0001
-#define DCR_SU1   0x0002
-#define DCR_WP0   0x0004
-#define DCR_WP1   0x0008
-#define DCR_W0    0x0010
-#define DCR_W1    0x0020
-#define DCR_P0    0x0040
-#define DCR_P1    0x0080
-#define DCR_PE0   0x0100
-#define DCR_PE1   0x0200
-#define DCR_E0    0x0400
-#define DCR_E1    0x0800
-
-/* M68302 INTERNAL RAM BASE ADDRESS INSTALLATION */
-
-#define M68302_ram_base_add_install(base_reg_add,ram_base_add) \
-  do { \
-    *((ushort *)base_reg_add) =  (ushort)(ram_base_add >> 12); \
-   a_m68302_imp = (struct m68302_imp *)ram_base_add; \
-  } while (0)
-
-#define M68302_system_ctrl_reg_install(val) (*((ulong *)M68302_SCR_ADD) = val)
-
-  /* INTERRUPTION */
-
-  /* Interrupt mode selection */
-
-#define M68302_it_mode_install(mode,vector_bank, \
-  extvect1,extvect6,extvect7,edgetrig1,edgetrig6,edgetrig7) \
-    M68302imp_it_mode = 0 | (mode << 15) | (vector_bank << 5) | \
-        (extvect7 << 14) | (extvect6 << 13) | (extvect1 <<12) | \
-        (edgetrig7 << 10) | (edgetrig6 << 9)|(edgetrig1 << 8)
-
-  /* CHIP SELECTION */
-
-  /* 'read_write' support values :
-   *
-   *  M68302_CS_READ_ONLY      for read only memory access chip select
-   *  M68302_CS_READ_WRITE_ONLY  for write only memory access chip select
-   *  M68302_CS_READ_AND_WRITE  for read & write memory access chip select
-   *
-   *  'nb_wait_state' : number of wait-state(s) from 0 to 6, 7 for external
-   *
-   */
-#define M68302_CS_READ_ONLY      0x02 /* read only memory access */
-#define M68302_CS_WRITE_ONLY     0x22 /* write only memory access */
-#define M68302_CS_READ_AND_WRITE 0x00 /* read and write memory access */
-
-#define M68302_cs_install(cs_nb,base_add,range,nb_wait_state,read_write) \
-  do { \
-    M68302imp_cs_option(cs_nb) = (((~(range - 1)) >> 11) & 0x1FFC) | \
-      (nb_wait_state << 13) | (read_write & 0x2); \
-    M68302imp_cs_base(cs_nb) = (((base_add >> 11) & 0x1FFC) | \
-      ((read_write >> 4) & 0x2) | 1); \
-  } while (0)
-
-#define M68302_set_cs_br(base_add, read_write)  \
-    ((((base_add) >> 11) & 0x1FFC) | (((read_write) >> 4) & 0x2) | 1)
-
-#define M68302_set_cs_or(range, nb_wait_state, read_write) \
-   ((((~(range - 1)) >> 11) & 0x1FFC) | \
-       ((nb_wait_state) << 13) | ((read_write) & 0x2))
-
-#define M68302_get_cs_br(cs)  \
-    (((ulong)((M68302imp_cs_base(cs)) & 0x1FFC)) << 11 )
-
-/* DRAM */
-
-#define M68en302_dram_install(bank,base_add,range)  \
-  M68en302imp_dba (bank)  = \
-    (((base_add >> 8) & 0xFE00) | (((~(range-1))>>16) & 0x007E) | 1)
-
-#endif
diff --git a/c/src/lib/libbsp/m68k/gen68302/make/custom/gen68302.cfg b/c/src/lib/libbsp/m68k/gen68302/make/custom/gen68302.cfg
deleted file mode 100644
index e60a641..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/make/custom/gen68302.cfg
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-#  Config file for a "generic 68302" BSP
-#
-
-include $(RTEMS_ROOT)/make/custom/default.cfg
-
-RTEMS_CPU=m68k
-RTEMS_CPU_MODEL=m68302
-
-#
-#  This contains the compiler options necessary to select the CPU model
-#  and (hopefully) optimize for it. 
-CPU_CFLAGS = -mcpu=68302
-
-# optimize flag: typically -O2
-CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
-CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
-
-LDFLAGS = -Wl,--gc-sections
diff --git a/c/src/lib/libbsp/m68k/gen68302/network/network.c b/c/src/lib/libbsp/m68k/gen68302/network/network.c
deleted file mode 100644
index 67cd951..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/network/network.c
+++ /dev/null
@@ -1,968 +0,0 @@
-/*
- * RTEMS driver for M68360 SCC1 Ethernet
- * W. Eric Norum
- * Saskatchewan Accelerator Laboratory
- * University of Saskatchewan
- * Saskatoon, Saskatchewan, CANADA
- * eric at skatter.usask.ca
- *
- * Modify for Motorola 68en320 Ethernet Controller
- * CXR S.A. France - 2000/09/14  - franckj at cxr.fr
- */
-#include <bsp.h>
-#include <stdio.h>
-#include <rtems/error.h>
-#include <m302_int.h>
-#include <rtems/rtems_bsdnet.h>
-
-#include <sys/param.h>
-#include <sys/mbuf.h>
-#include <sys/socket.h>
-#include <sys/sockio.h>
-#include <errno.h>
-
-#include <net/if.h>
-
-#include <netinet/in.h>
-#include <netinet/if_ether.h>
-#include <rtems/m68k/m68302.h>
-
-/*
- * Number of SCCs supported by this driver
- */
-#define NSCCDRIVER	1
-
-/*
- * Default number of buffer descriptors set aside for this driver.
- * The number of transmit buffer descriptors has to be quite large
- * since a single frame often uses four or more buffer descriptors.
- */
-#define RX_BUF_COUNT     64
-#define TX_BUF_COUNT     64
-
-/*
- * RTEMS event used by interrupt handler to signal driver tasks.
- * This must not be any of the events used by the network task synchronization.
- */
-#define INTERRUPT_EVENT	RTEMS_EVENT_1
-
-/*
- * RTEMS event used to start transmit daemon.
- * This must not be the same as INTERRUPT_EVENT.
- */
-#define START_TRANSMIT_EVENT	RTEMS_EVENT_2
-
-/*
- * Receive buffer size -- Allow for a full ethernet packet including CRC
- */
-#define RBUF_SIZE	1520
-
-#if (MCLBYTES < RBUF_SIZE)
-# error "Driver must have MCLBYTES > RBUF_SIZE"
-#endif
-
-static 	struct m68302_imp *		a_m68302_imp;
-
-#define M302_ETHER_IVECTOR		0x40
-
-/*
- * Per-device data
- */
-struct scc_softc {
-	struct arpcom		arpcom;
-	struct mbuf		**rxMbuf;
-	struct mbuf		**txMbuf;
-	int			acceptBroadcast;
-	int			rxBdCount;
-	int			txBdCount;
-	int			txBdHead;
-	int			txBdTail;
-	int			txBdActiveCount;
-
-	struct m68302_scc_bd 	*rxBdBase;
-	struct m68302_scc_bd 	*txBdBase;
-
-	rtems_id		rxDaemonTid;
-	rtems_id		txDaemonTid;
-
-	/*
-	 * Statistics
-	 */
-	unsigned long	rxInterrupts;
-	unsigned long	rxNotFirst;
-	unsigned long	rxNotLast;
-	unsigned long	rxGiant;
-	unsigned long	rxNonOctet;
-	unsigned long	rxRunt;
-	unsigned long	rxBadCRC;
-	unsigned long	rxOverrun;
-	unsigned long	rxCollision;
-
-	unsigned long	txInterrupts;
-	unsigned long	txDeferred;
-	unsigned long	txHeartbeat;
-	unsigned long	txLateCollision;
-	unsigned long	txRetryLimit;
-	unsigned long	txUnderrun;
-	unsigned long	txLostCarrier;
-	unsigned long	txRawWait;
-	unsigned long	txCoalesced;
-	unsigned long	txCoalesceFailed;
-	unsigned long	txRetry;
-};
-static struct scc_softc scc_softc[NSCCDRIVER];
-
-/*
- *  interrupt handler
- */
-static rtems_isr
-m302Enet_interrupt_handler (rtems_vector_number v)
-{
-
-	/*
-	 * Frame received?
-	 */
-	if (M68en302imp_intr_event & INTR_EVENT_BIT_RFINT) {
-		M68en302imp_intr_event = INTR_EVENT_BIT_RFINT;
-		M68en302imp_intr_mask &= ~INTR_MASK_BIT_RFIEN;
-		scc_softc[0].rxInterrupts++;
-		rtems_bsdnet_event_send (scc_softc[0].rxDaemonTid, INTERRUPT_EVENT);
-	}
-
-	/*
-	 * Buffer transmitted    or transmitter error?
-	 */
-	if ((M68en302imp_intr_event & INTR_EVENT_BIT_TFINT) ||
-		 ((M68en302imp_intr_event & INTR_EVENT_BIT_TXB))){
-		M68en302imp_intr_event = INTR_EVENT_BIT_TFINT | INTR_EVENT_BIT_TXB;
-		M68en302imp_intr_mask &= ~(INTR_MASK_BIT_TFIEN | INTR_MASK_BIT_TXIEN);
-		scc_softc[0].txInterrupts++;
-		rtems_bsdnet_event_send (scc_softc[0].txDaemonTid, INTERRUPT_EVENT);
-	}
-}
-
-/*
- * Initialize the ethernet hardware
- */
-static void
-m302Enet_initialize_hardware (struct scc_softc *sc)
-{
-	int i;
-	unsigned char *hwaddr;
-	rtems_status_code status;
-	rtems_isr_entry old_handler;
-	struct m68302_scc_bd	*a_bd;			/* Buffer Descriptor pointer */
-	ushort *cam;
-#define LBK		0x0008
-#define DSQE	0x0010
-#define FDE		0x0020
-
-	/*
-	 * standard loopback
-	 */
-	M68302imp_port_data	(1) &= ~(LBK);
-	M68302imp_port_data	(1) |= (FDE);
-
-	M68en302imp_ecntrl=0x0001;
-	/*
-	 * Set dma configuration status register EDMA
-	 */
-	i = (sc->txBdCount == 16) ? EDMA_BDSIZE_16T_112R :
-			(sc->txBdCount == 32) ? EDMA_BDSIZE_32T_96R :
-			(sc->txBdCount == 64) ? EDMA_BDSIZE_64T_64R :
-			EDMA_BDSIZE_8T_120R;
-
-	M68en302imp_edma =  EDMA_BLIM_8ACCESS | EDMA_WMRK_16FIFO | EDMA_BIT_TSRLY | (ushort)i;
-
-	/*
-	 * Set maximum receive buffer length
-	 */
-
-	M68en302imp_emrblr = RBUF_SIZE;	/* 1520 */
-
-	/*
-	 * Set interrupt vector
-	 */
-	M68en302imp_intr_vect = M302_ETHER_IVECTOR;
-
-	M68en302imp_intr_mask=0x0;
-
-	/*
-	 * Set ethernet Configuration
-	 */
-	M68en302imp_ecnfig=0x0000;
-
-	/*
-	 * Set ETHER_TEST
-	 */
-	M68en302imp_ether_test=0x0000;
-
-	/*
-	 *  Set AR control Register
-	 *	Ignore/accept broadcast packets as specified
-	 */
-	M68en302imp_ar_cntrl = ((sc->acceptBroadcast) ? 0 : AR_CNTRL_BIT_NO_BROADCAST) ;
-
-	/*
-	 * Allocate mbuf pointers
-	 */
-	sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT);
-	sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT);
-	if (!sc->rxMbuf || !sc->txMbuf)
-		rtems_panic ("No memory for mbuf pointers");
-
-	/*
-	 * Set our physical address
-	 */
-	hwaddr = sc->arpcom.ac_enaddr;
-
-	cam=(ushort *)(M68en302imp_cet);
-	for (i=0;i<64;i++){
-		cam[(4*i)]=0x00ff;
-		cam[(4*i)+1]=0x00ff;
-		cam[(4*i)+2]=0x00ff;
-	}
-
-	cam[4] = (hwaddr[0] << 8) | hwaddr[1];
-	cam[5] = (hwaddr[2] << 8) | hwaddr[3];
-	cam[6] = (hwaddr[4] << 8) | hwaddr[5];
-
-	/*
-	 * Set receiver and transmitter buffer descriptor bases
-	 */
-	a_bd = M68302imp_a_eth_bd (0);			/* point to first BD */
-
-	for (i=0;i<128;i++){
-
-		M68302_scc_bd_stat_ctrl	(a_bd + i) = 0;
-		M68302_scc_bd_data_lgth	(a_bd + i) = 0;
-		M68302_scc_bd_p_buffer	(a_bd + i) = NULL;
-	}
-
-	sc->txBdBase = M68302imp_a_eth_bd (  0 );			/* point to first BD */
-	sc->rxBdBase = M68302imp_a_eth_bd ( sc->txBdCount);		/* point to first RX BD atfer all TX*/
-
-	/*
-	 * Set up transmit buffer descriptors
-	 */
-	for (i = 0 ; i < sc->txBdCount ; i++) {
-		sc->txMbuf[i] = NULL;
-	}
-	sc->txBdHead = sc->txBdTail = 0;
-	sc->txBdActiveCount = 0;
-
-	/*
-	 * Clear any outstanding events
-	 */
-	M68en302imp_intr_event = 0x07FF;
-	/*
-	 * Set up interrupts
-	 */
-
-	status = rtems_interrupt_catch (m302Enet_interrupt_handler,
-						M302_ETHER_IVECTOR,
-						&old_handler);
-	if (status != RTEMS_SUCCESSFUL)
-		rtems_panic ("Can't attach M302 ether interrupt handler: %s\r\n",
-						rtems_status_text (status));
-}
-
-/*
- * Soak up buffer descriptors that have been sent
- * Note that a buffer descriptor can't be retired as soon as it becomes
- * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
- *  made up of multiple buffers, the user should not reuse the first buffer
- * descriptor until the last buffer descriptor of the frame has had its
- * ready bit cleared by the CPM".
- */
-static void
-m302Enet_retire_tx_bd (struct scc_softc *sc)
-{
-
-	uint16_t         status;
-	int i;
-	int nRetired;
-	struct mbuf *m, *n;
-	int retries = 0;
-	int saveStatus = 0;
-
-	i = sc->txBdTail;
-	nRetired = 0;
-	while ((sc->txBdActiveCount != 0)
-	   &&  (((status = (sc->txBdBase + i)->stat_ctrl) & BUF_STAT_READY) == 0)) {
-		/*
-		 * Check for errors which stop the transmitter.
-		 */
-		if (status & (BUF_STAT_LATE_COLLISION |
-				BUF_STAT_RETRY_LIMIT |
-				BUF_STAT_UNDERRUN)) {
-			int j;
-
-			if (status & BUF_STAT_LATE_COLLISION)
-				sc->txLateCollision++;
-			if (status & BUF_STAT_RETRY_LIMIT)
-				sc->txRetryLimit++;
-			if (status & BUF_STAT_UNDERRUN)
-				sc->txUnderrun++;
-
-			/*
-			 * Reenable buffer descriptors
-			 */
-			j = sc->txBdTail;
-			for (;;) {
-				status = (sc->txBdBase + j)->stat_ctrl;
-				if (status & BUF_STAT_READY)
-					break;
-				(sc->txBdBase + j)->stat_ctrl = BUF_STAT_READY |
-					(status & ( BUF_STAT_WRAP |
-						   BUF_STAT_INTERRUPT |
-						   BUF_STAT_LAST |
-						   BUF_STAT_TX_CRC));
-				if (status & BUF_STAT_LAST)
-					break;
-				if (++j == sc->txBdCount)
-					j = 0;
-			}
-
-			/*
-			 * Move transmitter back to the first
-			 * buffer descriptor in the frame.
-			 */
-/*			m360.scc1p._tbptr = m360.scc1p.tbase +
-				sc->txBdTail * sizeof (m360BufferDescriptor_t);
-*/
-			/*
-			 * Restart the transmitter
-			 */
-/*			M360ExecuteRISC (M360_CR_OP_RESTART_TX | M360_CR_CHAN_SCC1);*/
-			continue;
-		}
-		saveStatus |= status;
-		retries += (status >> 2) & 0xF;
-		nRetired++;
-		if (status & BUF_STAT_LAST) {
-			/*
-			 * A full frame has been transmitted.
-			 * Free all the associated buffer descriptors.
-			 */
-			if (saveStatus & BUF_STAT_DEFER)
-				sc->txDeferred++;
-			if (saveStatus & BUF_STAT_HEARTBIT)
-				sc->txHeartbeat++;
-			if (saveStatus & BUF_STAT_CARRIER_LOST)
-				sc->txLostCarrier++;
-			saveStatus = 0;
-			sc->txRetry += retries;
-			retries = 0;
-			sc->txBdActiveCount -= nRetired;
-			while (nRetired) {
-				nRetired--;
-				m = sc->txMbuf[sc->txBdTail];
-				MFREE (m, n);
-				if (++sc->txBdTail == sc->txBdCount)
-					sc->txBdTail = 0;
-			}
-		}
-		if (++i == sc->txBdCount)
-			i = 0;
-	}
-
-}
-
-/*
- * SCC reader task
- */
-static void
-scc_rxDaemon (void *arg)
-{
-
-	struct scc_softc *sc = (struct scc_softc *)arg;
-	struct ifnet *ifp = &sc->arpcom.ac_if;
-	struct mbuf *m;
-	uint16_t         status;
-	volatile struct m68302_scc_bd *rxBd;
-	int rxBdIndex;
-
-	/*
-	 * Allocate space for incoming packets and start reception
-	 */
-	for (rxBdIndex = 0 ; ;) {
-		rxBd = sc->rxBdBase + rxBdIndex;
-		MGETHDR (m, M_WAIT, MT_DATA);
-		MCLGET (m, M_WAIT);
-		m->m_pkthdr.rcvif = ifp;
-		sc->rxMbuf[rxBdIndex] = m;
-		rxBd->p_buffer = mtod (m, void *);
-
-		if (++rxBdIndex == sc->rxBdCount) {
-			rxBd->stat_ctrl = BUF_STAT_EMPTY | BUF_STAT_INTERRUPT | BUF_STAT_WRAP;
-			break;
-		}
-		rxBd->stat_ctrl = BUF_STAT_EMPTY | BUF_STAT_INTERRUPT;
-	}
-
-	/*
-	 * Input packet handling loop
-	 */
-	rxBdIndex = 0;
-	for (;;) {
-		rxBd = sc->rxBdBase + rxBdIndex;
-
-		/*
-		 * Wait for packet if there's not one ready
-		 */
-		if ((status = rxBd->stat_ctrl) & BUF_STAT_EMPTY) {
-			/*
-			 * Clear old events
-			 */
-			M68en302imp_intr_event = INTR_EVENT_BIT_RFINT;
-
-			/*
-			 * Wait for packet
-			 * Note that the buffer descriptor is checked
-			 * *before* the event wait -- this catches the
-			 * possibility that a packet arrived between the
-			 * `if' above, and the clearing of the event register.
-			 */
-			while ((status = rxBd->stat_ctrl) & BUF_STAT_EMPTY) {
-				rtems_interrupt_level level;
-				rtems_event_set events;
-
-				/*
-				 * Unmask RXF (Full frame received) event
-				 */
-				rtems_interrupt_disable (level);
-				M68en302imp_intr_mask |= INTR_MASK_BIT_RFIEN;
-
-				rtems_interrupt_enable (level);
-				rtems_bsdnet_event_receive (INTERRUPT_EVENT,
-						RTEMS_WAIT|RTEMS_EVENT_ANY,
-						RTEMS_NO_TIMEOUT,
-						&events);
-			}
-		}
-
-		/*
-		 * Check that packet is valid
-		 */
-		if ((status & (BUF_STAT_LAST |
-				BUF_STAT_FIRST_IN_FRAME |
-				BUF_STAT_LONG |
-				BUF_STAT_NONALIGNED |
-				BUF_STAT_SHORT |
-				BUF_STAT_CRC_ERROR |
-				BUF_STAT_OVERRUN |
-				BUF_STAT_COLLISION)) ==
-						(BUF_STAT_LAST |
-						BUF_STAT_FIRST_IN_FRAME)) {
-			/*
-			 * Pass the packet up the chain.
-			 * FIXME: Packet filtering hook could be done here.
-			 */
-			struct ether_header *eh;
-
-			m = sc->rxMbuf[rxBdIndex];
-			m->m_len = m->m_pkthdr.len = rxBd->data_lgth -
-						sizeof(uint32_t) -
-						sizeof(struct ether_header);
-			eh = mtod (m, struct ether_header *);
-			m->m_data += sizeof(struct ether_header);
-
-			ether_input (ifp, eh, m);
-
-			/*
-			 * Allocate a new mbuf
-			 */
-			MGETHDR (m, M_WAIT, MT_DATA);
-			MCLGET (m, M_WAIT);
-			m->m_pkthdr.rcvif = ifp;
-			sc->rxMbuf[rxBdIndex] = m;
-			rxBd->p_buffer = mtod (m, void *);
-		}
-		else {
-			/*
-			 * Something went wrong with the reception
-			 */
-			if (!(status & BUF_STAT_LAST))
-				sc->rxNotLast++;
-			if (!(status & BUF_STAT_FIRST_IN_FRAME))
-				sc->rxNotFirst++;
-			if (status & BUF_STAT_LONG)
-				sc->rxGiant++;
-			if (status & BUF_STAT_NONALIGNED)
-				sc->rxNonOctet++;
-			if (status & BUF_STAT_SHORT)
-				sc->rxRunt++;
-			if (status & BUF_STAT_CRC_ERROR)
-				sc->rxBadCRC++;
-			if (status & BUF_STAT_OVERRUN)
-				sc->rxOverrun++;
-			if (status & BUF_STAT_COLLISION)
-				sc->rxCollision++;
-		}
-
-		/*
-		 * Reenable the buffer descriptor
-		 */
-		rxBd->stat_ctrl = (status & (BUF_STAT_WRAP | BUF_STAT_INTERRUPT)) | BUF_STAT_EMPTY;
-
-		/*
-		 * Move to next buffer descriptor
-		 */
-		if (++rxBdIndex == sc->rxBdCount)
-			rxBdIndex = 0;
-	}
-
-}
-
-static void
-sendpacket (struct ifnet *ifp, struct mbuf *m)
-{
-
-	struct scc_softc *sc = ifp->if_softc;
-	volatile struct m68302_scc_bd *firstTxBd, *txBd;
-	struct mbuf *l = NULL;
-	uint16_t         status;
-	int nAdded;
-
-	/*
-	 * Free up buffer descriptors
-	 */
-	m302Enet_retire_tx_bd (sc);
-	/*
-	 * Set up the transmit buffer descriptors.
-	 * No need to pad out short packets since the
-	 * hardware takes care of that automatically.
-	 * No need to copy the packet to a contiguous buffer
-	 * since the hardware is capable of scatter/gather DMA.
-	 */
-	status = 0;
-	nAdded = 0;
-	txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
-	while (m) {
-		/*
-		 * There are more mbufs in the packet than there
-		 * are transmit buffer descriptors.
-		 * Coalesce into a single buffer.
-		 */
-		if (nAdded == sc->txBdCount) {
-			struct mbuf *nm;
-			int j;
-			char *dest;
-
-			/*
-			 * Get the pointer to the first mbuf of the packet
-			 */
-			if (sc->txBdTail != sc->txBdHead)
-				rtems_panic ("sendpacket coalesce");
-			m = sc->txMbuf[sc->txBdTail];
-
-			/*
-			 * Rescind the buffer descriptor READY bits
-			 */
-			for (j = 0 ; j < sc->txBdCount ; j++)
-				(sc->txBdBase + j)->stat_ctrl = 0;
-
-			/*
-			 * Allocate an mbuf cluster
-			 * Toss the packet if allocation fails
-			 */
-			MGETHDR (nm, M_DONTWAIT, MT_DATA);
-			if (nm == NULL) {
-				sc->txCoalesceFailed++;
-				m_freem (m);
-
-				return;
-			}
-			MCLGET (nm, M_DONTWAIT);
-			if (nm->m_ext.ext_buf == NULL) {
-				sc->txCoalesceFailed++;
-				m_freem (m);
-				m_free (nm);
-
-				return;
-			}
-			nm->m_pkthdr = m->m_pkthdr;
-			nm->m_len = nm->m_pkthdr.len;
-
-			/*
-			 * Copy data from packet chain to mbuf cluster
-			 */
-			sc->txCoalesced++;
-			dest = nm->m_ext.ext_buf;
-			while (m) {
-				struct mbuf *n;
-
-				if (m->m_len) {
-					memcpy (dest, mtod(m, caddr_t), m->m_len);
-					dest += m->m_len;
-				}
-				MFREE (m, n);
-				m = n;
-			}
-
-			/*
-			 * Redo the send with the new mbuf cluster
-			 */
-			m = nm;
-			nAdded = 0;
-			status = 0;
-
-			continue;
-		}
-
-		/*
-		 * Wait for buffer descriptor to become available.
-		 */
-		if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
-			/*
-			 * Clear old events
-			 */
-			M68en302imp_intr_event = INTR_EVENT_BIT_TFINT | INTR_EVENT_BIT_TXB;
-
-			/*
-			 * Wait for buffer descriptor to become available.
-			 * Note that the buffer descriptors are checked
-			 * *before* entering the wait loop -- this catches
-			 * the possibility that a buffer descriptor became
-			 * available between the `if' above, and the clearing
-			 * of the event register.
-			 * This is to catch the case where the transmitter
-			 * stops in the middle of a frame -- and only the
-			 * last buffer descriptor in a frame can generate
-			 * an interrupt.
-			 */
-			m302Enet_retire_tx_bd (sc);
-			while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
-				rtems_interrupt_level level;
-				rtems_event_set events;
-
-				/*
-				 * Unmask TXB (buffer transmitted) and
-				 * TXE (transmitter error) events.
-				 */
-				rtems_interrupt_disable (level);
-				M68en302imp_intr_mask |= INTR_MASK_BIT_TFIEN | INTR_MASK_BIT_TXIEN;
-  				rtems_interrupt_enable (level);
-
-				rtems_bsdnet_event_receive (INTERRUPT_EVENT,
-						RTEMS_WAIT|RTEMS_EVENT_ANY,
-						RTEMS_NO_TIMEOUT,
-						&events);
-				m302Enet_retire_tx_bd (sc);
-			}
-		}
-
-		/*
-		 * The IP fragmentation routine in ip_output
-		 * can produce packet fragments with zero length.
-		 */
-		if (m->m_len) {
-			/*
-			 * Fill in the buffer descriptor.
-			 * Don't set the READY flag in the first buffer
-			 * descriptor till the whole packet has been readied.
-			 */
-			txBd = sc->txBdBase + sc->txBdHead;
-			txBd->p_buffer = mtod (m, void *);
-			txBd->data_lgth = m->m_len;
-
-			sc->txMbuf[sc->txBdHead] = m;
-			status = nAdded ? BUF_STAT_READY : 0;
-			if (++sc->txBdHead == sc->txBdCount) {
-				status |= BUF_STAT_WRAP;
-				sc->txBdHead = 0;
-			}
-			txBd->stat_ctrl = status;
-			l = m;
-			m = m->m_next;
-			nAdded++;
-
-		}
-		else {
-			/*
-			 * Just toss empty mbufs
-			 */
-			struct mbuf *n;
-			MFREE (m, n);
-			m = n;
-			if (l != NULL)
-				l->m_next = m;
-
-		}
-	}
-	if (nAdded) {
-		/*
-		 * Send the packet
-		 */
-		txBd->stat_ctrl = status | BUF_STAT_LAST | BUF_STAT_TX_CRC | BUF_STAT_INTERRUPT;
-		firstTxBd->stat_ctrl |= BUF_STAT_READY;
-		sc->txBdActiveCount += nAdded;
-
-	}
-
-}
-
-/*
- * Driver transmit daemon
- */
-void
-scc_txDaemon (void *arg)
-{
-
-	struct scc_softc *sc = (struct scc_softc *)arg;
-	struct ifnet *ifp = &sc->arpcom.ac_if;
-	struct mbuf *m;
-	rtems_event_set events;
-
-	for (;;) {
-		/*
-		 * Wait for packet
-		 */
-		rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
-
-		/*
-		 * Send packets till queue is empty
-		 */
-		for (;;) {
-			/*
-			 * Get the next mbuf chain to transmit.
-			 */
-			IF_DEQUEUE(&ifp->if_snd, m);
-			if (!m)
-				break;
-			sendpacket (ifp, m);
-		}
-		ifp->if_flags &= ~IFF_OACTIVE;
-	}
-
-}
-
-/*
- * Send packet (caller provides header).
- */
-static void
-scc_start (struct ifnet *ifp)
-{
-	struct scc_softc *sc = ifp->if_softc;
-
-	rtems_bsdnet_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
-	ifp->if_flags |= IFF_OACTIVE;
-}
-
-/*
- * Initialize and start the device
- */
-static void
-scc_init (void *arg)
-{
-	struct scc_softc *sc = arg;
-	struct ifnet *ifp = &sc->arpcom.ac_if;
-
-	if (sc->txDaemonTid == 0) {
-
-		/*
-		 * Set up SCC hardware
-		 */
-		m302Enet_initialize_hardware (sc);
-
-		sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
-		sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
-
-	}
-
-	/*
-	 * Set flags appropriately
-	 */
-/*	if (ifp->if_flags & IFF_PROMISC)
-		m360.scc1.psmr |= 0x200;
-	else
-		m360.scc1.psmr &= ~0x200;
-*/
-	/*
-	 * Tell the world that we're running.
-	 */
-	ifp->if_flags |= IFF_RUNNING;
-
-	/*
-	 * Enable receiver and transmitter
-	 */
-	M68en302imp_ecntrl = ECNTRL_BIT_RESET	| ECNTRL_BIT_ETHER_EN;
-
-}
-
-/*
- * Stop the device
- */
-static void
-scc_stop (struct scc_softc *sc)
-{
-
-	struct ifnet *ifp = &sc->arpcom.ac_if;
-
-	ifp->if_flags &= ~IFF_RUNNING;
-
-	/*
-	 * Shut down receiver and transmitter
-	 */
-	M68en302imp_ecntrl &= ~(ECNTRL_BIT_RESET	| ECNTRL_BIT_ETHER_EN);
-
-}
-
-/*
- * Show interface statistics
- */
-static void
-scc_stats (struct scc_softc *sc)
-{
-	printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
-	printf ("       Not First:%-8lu", sc->rxNotFirst);
-	printf ("        Not Last:%-8lu\r\n", sc->rxNotLast);
-	printf ("              Giant:%-8lu", sc->rxGiant);
-	printf ("            Runt:%-8lu", sc->rxRunt);
-	printf ("       Non-octet:%-8lu\r\n", sc->rxNonOctet);
-	printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
-	printf ("         Overrun:%-8lu", sc->rxOverrun);
-	printf ("       Collision:%-8lu\r\n", sc->rxCollision);
-/*	printf ("          Discarded:%-8lu\r\n", (unsigned long)m360.scc1p.un.ethernet.disfc);
-*/
-	printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
-	printf ("        Deferred:%-8lu", sc->txDeferred);
-	printf (" Missed Hearbeat:%-8lu\r\n", sc->txHeartbeat);
-	printf ("         No Carrier:%-8lu", sc->txLostCarrier);
-	printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
-	printf ("  Late Collision:%-8lu\r\n", sc->txLateCollision);
-	printf ("           Underrun:%-8lu", sc->txUnderrun);
-	printf (" Raw output wait:%-8lu", sc->txRawWait);
-	printf ("       Coalesced:%-8lu\r\n", sc->txCoalesced);
-	printf ("    Coalesce failed:%-8lu", sc->txCoalesceFailed);
-	printf ("         Retries:%-8lu\r\n", sc->txRetry);
-}
-
-/*
- * Driver ioctl handler
- */
-static int
-scc_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
-{
-
-	struct scc_softc *sc = ifp->if_softc;
-	int error = 0;
-
-	switch (command) {
-	case SIOCGIFADDR:
-	case SIOCSIFADDR:
-		ether_ioctl (ifp, command, data);
-		break;
-
-	case SIOCSIFFLAGS:
-		switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
-		case IFF_RUNNING:
-			scc_stop (sc);
-			break;
-
-		case IFF_UP:
-			scc_init (sc);
-			break;
-
-		case IFF_UP | IFF_RUNNING:
-			scc_stop (sc);
-			scc_init (sc);
-			break;
-
-		default:
-			break;
-		}
-		break;
-
-	case SIO_RTEMS_SHOW_STATS:
-		scc_stats (sc);
-		break;
-
-	/*
-	 * FIXME: All sorts of multicast commands need to be added here!
-	 */
-	default:
-		error = EINVAL;
-		break;
-	}
-	return error;
-
-}
-
-/*
- * Attach an SCC driver to the system
- */
-int
-rtems_ether1_driver_attach (struct rtems_bsdnet_ifconfig *config)
-{
-	struct scc_softc *sc;
-	struct ifnet *ifp;
-	int mtu;
-	int unitNumber;
-	char *unitName;
-
-	a_m68302_imp = (struct m68302_imp *)0x700000L;
-	/*
- 	 * Parse driver name
-	 */
-	if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
-		return 0;
-
-	/*
-	 * Is driver free?
-	 */
-	if ((unitNumber <= 0) || (unitNumber > NSCCDRIVER)) {
-		printf ("Bad SCC unit number.\r\n");
-		return 0;
-	}
-	sc = &scc_softc[unitNumber - 1];
-	ifp = &sc->arpcom.ac_if;
-	if (ifp->if_softc != NULL) {
-		printf ("Driver already in use.\r\n");
-		return 0;
-	}
-
-	/*
-	 * Process options
-	 */
-	if (config->hardware_address) {
-		memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
-	}
-
-	if (config->mtu)
-		mtu = config->mtu;
-	else
-		mtu = ETHERMTU;
-	if (config->rbuf_count)
-		sc->rxBdCount = config->rbuf_count;
-	else
-		sc->rxBdCount = RX_BUF_COUNT;
-	if (config->xbuf_count)
-		sc->txBdCount = config->xbuf_count;
-	else
-		sc->txBdCount = TX_BUF_COUNT;
-	sc->acceptBroadcast = !config->ignore_broadcast;
-
-	/*
-	 * Set up network interface values
-	 */
-	ifp->if_softc = sc;
-	ifp->if_unit = unitNumber;
-	ifp->if_name = unitName;
-	ifp->if_mtu = mtu;
-	ifp->if_init = scc_init;
-	ifp->if_ioctl = scc_ioctl;
-	ifp->if_start = scc_start;
-	ifp->if_output = ether_output;
-	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
-	if (ifp->if_snd.ifq_maxlen == 0)
-		ifp->if_snd.ifq_maxlen = ifqmaxlen;
-
-	/*
-	 * Attach the interface
-	 */
-	if_attach (ifp);
-	ether_ifattach (ifp);
-	return 1;
-};
diff --git a/c/src/lib/libbsp/m68k/gen68302/preinstall.am b/c/src/lib/libbsp/m68k/gen68302/preinstall.am
deleted file mode 100644
index 9d1687e..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/preinstall.am
+++ /dev/null
@@ -1,71 +0,0 @@
-## Automatically generated by ampolish3 - Do not edit
-
-if AMPOLISH3
-$(srcdir)/preinstall.am: Makefile.am
-	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
-endif
-
-PREINSTALL_DIRS =
-DISTCLEANFILES += $(PREINSTALL_DIRS)
-
-all-am: $(PREINSTALL_FILES)
-
-PREINSTALL_FILES =
-CLEANFILES = $(PREINSTALL_FILES)
-
-all-local: $(TMPINSTALL_FILES)
-
-TMPINSTALL_FILES =
-CLEANFILES += $(TMPINSTALL_FILES)
-
-$(PROJECT_LIB)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_LIB)
-	@: > $(PROJECT_LIB)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)
-	@: > $(PROJECT_INCLUDE)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
-PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
-
-$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-
-$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
-
-$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-
-$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
-
-$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
-
-$(PROJECT_INCLUDE)/m302_int.h: include/m302_int.h $(PROJECT_INCLUDE)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/m302_int.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/m302_int.h
-
-$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
-
-$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-
diff --git a/c/src/lib/libbsp/m68k/gen68302/start/start.S b/c/src/lib/libbsp/m68k/gen68302/start/start.S
deleted file mode 100644
index 0eb19e4..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/start/start.S
+++ /dev/null
@@ -1,255 +0,0 @@
-/*  entry.s
- *
- *  This file contains the entry point for the application.
- *  The name of this entry point is compiler dependent.
- *  It jumps to the BSP which is responsible for performing
- *  all initialization.
- *
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems/asm.h>
-
-  .set	BAR,		0xF2		| Base Address Register location
-  .set	SCR,		0xF4		| System Control Register location
-  .set	BAR_VAL,	0x0f7f		| BAR value
-  .set	SCR_VAL,	0x00080f00	| SCR value
-  .set	GIMR_VAL,	0x8780		|Global Interrupt Mode Register. (MUST BE WRITTEN).
-  .set	BaseAddr,(BAR_VAL&0x0fff)<<12	| MC68302 internal base address
-
-  .set	oSYSRAM,	0x000		| 576 bytes of internal system RAM
-
-  .set	oGIMR,		0x812
-
-  .set	oCS0_Base,	0x830		| 16 bits, Chip Sel 0 Base Reg
-  .set	oCS0_Option,	0x832		| 16 bits, Chip Sel 0 Option Reg
-  .set	oCS1_Base,	0x834		| 16 bits, Chip Sel 1 Base Reg
-  .set	oCS1_Option,	0x836		| 16 bits, Chip Sel 1 Option Reg
-  .set	oCS2_Base,	0x838		| 16 bits, Chip Sel 2 Base Reg
-  .set	oCS2_Option,	0x83a		| 16 bits, Chip Sel 2 Option Reg
-  .set	oCS3_Base,	0x83c		| 16 bits, Chip Sel 3 Base Reg
-  .set	oCS3_Option,	0x83e		| 16 bits, Chip Sel 3 Option Reg
-
-  .set	tmpSRAM_BASE,	0x400000	| start of temporary SRAM
-  .set	FLASH_BASE,	0xc00000	| start of FLASH''s normal location
-
-BEGIN_CODE
-         PUBLIC (M68Kvec)               | Vector Table
-SYM (M68Kvec):				| standard location for vectors
-V___ISSP: .long	0x00001000		|00  0 Reset: Initial SSP
-V____IPC: .long	SYM(start)-V___ISSP	|04  1 Reset: Initial PC
-V_BUSERR: .long	Bad-V___ISSP		|08  2 Bus Error
-V_ADRERR: .long	Bad-V___ISSP		|0c  3 Address Error
-	.space	240			| reserve space for reset of vectors
-
-#if ( M68K_HAS_SEPARATE_STACKS == 1 )
-SYM (lowintstack):
-        .space   4092                   | reserve for interrupt stack
-SYM (hiintstack):
-        .space   4                      | end of interrupt stack
-#endif
-
-	PUBLIC (start)                 | Default entry point for GNU
-SYM (start):
-	move.w	#0x2700,sr		| Disable all interrupts
-	move.w	#BAR_VAL,BAR		| Set Base Address Register
-	move.l	#SCR_VAL,SCR		| Set System Control Register
-	lea	BaseAddr,a5
-	move.w	#GIMR_VAL,a5@(oGIMR)	| Set Global Interrupt Mode Register
-
-|
-| Set up chip select registers for the remapping process.
-|
-
-|
-|      0      X      x    x    x    x
-| 0  000 0  0-- -  --- ---- ---- ----
-| x  xxx x  xxx x  xx
-|
-	move.w	#0xc001,a5@(oCS0_Base)   | Expand CS0 to full size (FLASH)
-	move.w	#0x1f82,a5@(oCS0_Option) | 000000-03ffff, R, 0 WS
-
-|
-|      X      x      x    x    x    x
-| 0  100 0  0-- -  --- ---- ---- ----
-| x  xxx x  xxx x  xx
-|
-	move.w	#0xa801,a5@(oCS1_Base)   | Set up and enable CS1 (SRAM)
-	move.w	#0x1f80,a5@(oCS1_Option) | 400000-43ffff, RW, 0 WS
-
-|
-| Copy the initial boot FLASH area to the temporary SRAM location.
-|
-		moveq	#0,d0
-		movea.l	d0,a0			| a0 -> start of FLASH
-		lea	tmpSRAM_BASE,a1 	| a1 -> start of tmp SRAM
-|		moveq	#(endPreBoot-V___ISSP)/4,d0	| # longs to copy
-		moveq	#127,d0
-cpy_flash:	move.l	(a0)+,(a1)+		| copy
-		subq.l	#1,d0
-		bne	cpy_flash
-
-|
-| Copy remap code to 68302''s internal system RAM.
-|
-		movea.w	#begRemap-V___ISSP,a0	| a0 -> remap code
-		lea	a5@(oSYSRAM),a1	| a1 -> internal system RAM
-|		moveq	#(endRemap-begRemap)/2-1,d0	| d0 = # words to copy
-		moveq	#11,d0
-cpy_remap:	move.w	(a0)+,(a1)+		| copy
-		dbra	d0,cpy_remap
-
-|
-| Jump to the remap code in the 68302''s internal system RAM.
-|
-		jmp	a5@(oSYSRAM)		| (effectively a jmp begRemap)
-
-|
-| This remap code, when executed from the 68302''s internal system RAM
-| will 1) remap CS1 so that SRAM is at 0
-|      2) remap CS0 so that FLASH is at FLASH_BASE
-|  and 3) jump to executable code in the remapped FLASH.
-|
-begRemap:	move.w	#0xa001,a5@(oCS1_Base)	| Move CS1 (SRAM)
-		move.w	#0xd801,a5@(oCS0_Base)	| Move CS0 (FLASH)
-		lea	FLASH_BASE,a0
-		jmp	a0@(endRemap-V___ISSP.w)	| Jump back to FLASH
-endRemap:
-|
-| Now set up the remaining chip select registers.
-|
-
-|
-|      4      0      x    x    x    x
-| 1  000 1  111 0  000 0--- ---- ----
-| x  xxx x  xxx x  xx
-|
- 	move.w	#0xb1e1,a5@(oCS2_Base)		| Set up and enable CS2 (dpRAM)
- 	move.w	#0x1ff0,a5@(oCS2_Option)	| 8f0000-8f07ff, RW, 0 WS
-
-|
-|      8      X      x    x    x    x
-| 1  000 0  0-- -  --- ---- ---- ----
-| x  xxx x  xxx x  xx
-|
-	move.w	#0xd001,a5@(oCS3_Base)		| Set up and enable CS3 (IO)
-	move.w	#0x1f80,a5@(oCS3_Option)	| 800000-83ffff, RW, 0 WS
-
-endPreBoot:
-
-	move.b	#0x30,0x800001			| set status LED amber
-
- .set	oPIOB_Ctrl,	0x824
- .set	oPIOB_DDR,	0x826
- .set	oPIOB_Data,	0x828
-
- .set	oPIOA_Ctrl,	0x81e
- .set	oPIOA_DDR,	0x820
- .set	oPIOA_Data,	0x822
-
-	move.w	#0x0ff8,a5@(oPIOB_Data)	| Make output follow resistors.
-	move.w	#0x00ff,a5@(oPIOB_DDR)		| Set up PB7-PB0 for output.
-	move.w	#0x0080,a5@(oPIOB_Ctrl)	| Set up WDOG* as dedicated
-						| peripheral pins.
-
-	move.w	#0x1fff,a5@(oPIOA_Data)	| Make output follow resistors.
-	move.w	#0xea2a,a5@(oPIOA_DDR)		| Set up PA15-PA0 for in/output.
-	move.w	#0x0003,a5@(oPIOA_Ctrl)	| Set up TXD2/RXD2 as dedicated
-						| peripheral pins.
-
-|
-| Place "Bad" in all vectors from 010 thru 0ec.  Vectors 0f0 and 0f4
-| are not set because they are the 68302''s BAR and SCR.
-|
-		movea.w	#0x010,a0
-		moveq	#(0x0f0-0x010)/4-1,d0
-		move.l	#Bad,d1
-cpy_Bad:	move.l	d1,(a0)+
-		dbra	d0,cpy_Bad
-
- .set	vbase,	0x0200
-
-		lea	vbase,a0
-		moveq	#31,d0
-cpy_Bad1:	move.l	d1,(a0)+
-		dbra	d0,cpy_Bad1
-
-|
-| Fill in special locations to configure OS
-|
-		move.l	#Bad,0x008		| Bus Error
-		move.l	#Bad,0x00c		| Address Error
-		move.l	#Bad,0x024		| Trace
-|		move.l	#KE_IRET,$0b4		| pSOS+ RET_I Call
-
-|		move.l	#_cnsl_isr,vbase+0x028	| SCC2
-		move.l	#timerisr,vbase+0x018	| Timer ISR
-
-        |
-        | zero out uninitialized data area
-        |
-zerobss:
-        moveal  # SYM (_clear_end),a0            | find end of .bss
-        moveal  # SYM (_clear_start),a1          | find beginning of .bss
-        moveq   #0,d0
-
-loop:   movel   d0,a1 at +                | to zero out uninitialized
-        cmpal   a0,a1
-        jlt     loop                    | loop until _clear_end reached
-
-        movel   d0, SYM (_stack_init)  | Set Stack pointer
-        movw    #0x3700,sr             | SUPV MODE,INTERRUPTS OFF!!!
-        movel   d0,a7                  | set master stack pointer
-        movel   d0,a6                  | set base pointer
-
-      /*
-       *  RTEMS should maintain a separate interrupt stack on CPUs
-       *  without one in hardware.  This is currently not supported
-       *  on versions of the m68k without a HW intr stack.
-       */
-
-#if ( M68K_HAS_SEPARATE_STACKS == 1 )
-        lea     SYM (hiintstack),a0          | a0 = high end of intr stack
-        movec   a0,isp                | set interrupt stack
-#endif
-
-        move.l  #0,a7 at -               | command line
-        jsr     SYM (boot_card)
-
-	nop
-Bad:	bra	Bad
-
-	nop
-END_CODE
-
-BEGIN_DATA
-
-	PUBLIC (start_frame)
-SYM (start_frame):
-        .space  4,0
-
-	PUBLIC (stack_start)
-SYM (stack_start):
-        .space  4,0
-END_DATA
-
-BEGIN_BSS
-
-	PUBLIC (environ)
-        .align 2
-SYM (environ):
-        .long  0
-
-	PUBLIC (heap_size)
-        .set   SYM (heap_size),0x2000
-
-        PUBLIC (stack_size)
-        .set   SYM (stack_size),0x1000
-
-END_DATA
-END
diff --git a/c/src/lib/libbsp/m68k/gen68302/startup/linkcmds b/c/src/lib/libbsp/m68k/gen68302/startup/linkcmds
deleted file mode 100644
index 34f42b9..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/startup/linkcmds
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- *  This file contains directives for the GNU linker which are specific
- *  to the Generic MC68302 board.
- * 
- *  COPYRIGHT (c) 1989-2007.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-MEMORY 
-{
-	ram : org = 0x0000, l = 16M
-}
-
-m302 = 0xf7f000;
-_VBR = 0x000000;		/* location of the VBR table (in RAM) */
-
-/*
- * Declare some sizes.
- */
-RamBase = DEFINED(RamBase) ? RamBase : 0x0;
-RamSize = DEFINED(RamSize) ? RamSize : 16M;
-HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
-_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
-
-SECTIONS
-{
-	ram : {
-		. = 0xc00000;
-	} >ram
-
-        /*
-         * Text, data and bss segments
-         */
-        .text : {
-                *(.text*)
-
-		/*
-		 * C++ constructors/destructors
-		 */
-		*(.gnu.linkonce.t.*)
-
-		/*
-		 * Initialization and finalization code.
-     		 *
-     		 * Various files can provide initialization and finalization
-		 * functions.  crtbegin.o and crtend.o are two instances. The
-		 * body of these functions are in .init and .fini sections. We
-		 * accumulate the bodies here, and prepend function prologues
-		 * from crti.o and function epilogues from crtn.o. crti.o must
-		 * be linked first; crtn.o must be linked last.  Because these
-		 * are wildcards, it doesn't matter if the user does not
-		 * actually link against crti.o and crtn.o; the linker won't
-		 * look for a file to match a wildcard.  The wildcard also
-		 * means that it doesn't matter which directory crti.o and
-		 * crtn.o are in. 
-		 */
-		PROVIDE (_init = .);
-		*crti.o(.init)
-		*(.init)
-		*crtn.o(.init)
-		PROVIDE (_fini = .);
-		*crti.o(.fini)
-		*(.fini)
-		*crtn.o(.fini)
-
-		/*
-		 * Special FreeBSD sysctl sections.
-		 */
-		. = ALIGN (16);
-		__start_set_sysctl_set = .;
-		*(set_sysctl_*);
-		__stop_set_sysctl_set = ABSOLUTE(.);
-		*(set_domain_*);
-		*(set_pseudo_*);
-
-		/*
-		 * C++ constructors/destructors
-     		 *
-     		 * gcc uses crtbegin.o to find the start of the constructors
-		 * and destructors so we make sure it is first.  Because this
-		 * is a wildcard, it doesn't matter if the user does not
-		 * actually link against crtbegin.o; the linker won't look for
-		 * a file to match a wildcard.  The wildcard also means that
-		 * it doesn't matter which directory crtbegin.o is in. The
-		 * constructor and destructor list are terminated in
-		 * crtend.o.  The same comments apply to it.
-		 */
-		. = ALIGN (16);
-		*crtbegin.o(.ctors)
-		*(.ctors)
-		*crtend.o(.ctors)
-		*crtbegin.o(.dtors)
-		*(.dtors)
-		*crtend.o(.dtors)
-
-		/*
-		 * Exception frame info
-		 */
-		. = ALIGN (16);
-		*(.eh_frame)
-
-		/*
-		 * Read-only data
-		 */
-		. = ALIGN (16);
-		_rodata_start = . ;
-		*(.rodata*)
-		KEEP (*(SORT(.rtemsroset.*)))
-		*(.gnu.linkonce.r*)
-
-                 . = ALIGN (16);
-                PROVIDE (_etext = .);
-        } >ram
-
-	.tdata : {
-		_TLS_Data_begin = .;
-		*(.tdata .tdata.* .gnu.linkonce.td.*)
-		_TLS_Data_end = .;
-	} >ram
-
-	.tbss : {
-		_TLS_BSS_begin = .;
-		*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
-		_TLS_BSS_end = .;
-	} >ram
-
-	_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
-	_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
-	_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
-	_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
-	_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
-	_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
-
-        .data : {
-                PROVIDE (_copy_start = .);
-                *(.data*)
-                KEEP (*(SORT(.rtemsrwset.*)))
-		*(.gnu.linkonce.d*)
-		*(.gcc_except_table*)
-		*(.jcr)
-                . = ALIGN (16);
-                PROVIDE (_edata = .);
-                PROVIDE (_copy_end = .);
-        } >ram
-        .bss : {
-                _clear_start = .;
-                *(.dynbss)
-                *(.bss* .gnu.linkonce.b.*)
-                *(COMMON)
-                . = ALIGN (16);
-                PROVIDE (end = .);
-
-                . += _StackSize;
-                . = ALIGN (16);
-                _stack_init = .;
-                _clear_end = .;
-
-                WorkAreaBase = .;
-        } >ram
-
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment 0 : { *(.comment) }
-
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-  /* These must appear regardless of  .  */
-}
diff --git a/c/src/lib/libbsp/m68k/gen68302/timer/timer.c b/c/src/lib/libbsp/m68k/gen68302/timer/timer.c
deleted file mode 100644
index 6749efc..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/timer/timer.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems.h>
-#include <bsp.h>
-#include <rtems/btimer.h>
-#include <rtems/m68k/m68302.h>
-
-#define TMR2_VAL 0x071b	/* Timer mode register
-			 * (section 3.5.2.1 in 68302 manual)
-			 * 15-8: "7"	prescaler divide by 8 (x+1)
-			 *  7-6: 00	dis. intr. on capture event
-			 *    5:  0	active-low pulse
-			 *    4:  1	intr. on reaching reference
-			 *    3:  1	restart counter on reference
-			 *  2-1: 01	master clock input source
-			 *    0:  1	enable timer
-			 */
-#define TRR2_VAL 2000	/* Timer reference register
-			 * (section 3.5.2.2 in 68302 manual)
-			 * 2000 ticks @ (16MHz/1)/8 = 1-ms count
-			 */
-
-uint32_t         Timer_interrupts;
-
-bool benchmark_timer_find_average_overhead;
-
-rtems_isr timerisr(void);
-
-void benchmark_timer_initialize( void )
-{
-    m302.reg.tmr2 = 0;			/* disable timer */
-
-    Timer_interrupts = 0;		/* clear timer ISR count */
-
-    m302.reg.trr2 = TRR2_VAL;		/* set timer reference register */
-    m302.reg.tmr2 = TMR2_VAL;		/* set timer mode register */
-    m302.reg.imr |= RBIT_IMR_TIMER2;	/* set 68302 int-mask to allow ints */
-}
-
-/*
- *  The following controls the behavior of benchmark_timer_read().
- *
- *  FIND_AVG_OVERHEAD *  instructs the routine to return the "raw" count.
- *
- *  AVG_OVEREHAD is the overhead for starting and stopping the timer.  It
- *  is usually deducted from the number returned.
- *
- *  LEAST_VALID is the lowest number this routine should trust.  Numbers
- *  below this are "noise" and zero is returned.
- */
-
-#define AVG_OVERHEAD      0  /* It typically takes X.X microseconds */
-                             /* (Y countdowns) to start/stop the timer. */
-                             /* This value is in microseconds. */
-#define LEAST_VALID       1  /* Don't trust a clicks value lower than this */
-
-/*
- * Return timer value in 1/2-microsecond units
- */
-benchmark_timer_t benchmark_timer_read( void )
-{
-  uint16_t         clicks;
-  uint32_t         total;
-
-  /*
-   *  Read the timer and see how many clicks it has been since counter
-   *  rolled over.
-   */
-
-  clicks = m302.reg.tcn2;
-
-  /*
-   *  Total is calculated by taking into account the number of timer overflow
-   *  interrupts since the timer was initialized and clicks since the last
-   *  interrupts.
-   */
-
-  total = (Timer_interrupts * TRR2_VAL) + clicks;
-
-  if ( benchmark_timer_find_average_overhead == true )
-    return total;          /* in XXX microsecond units */
-
-  if ( total < LEAST_VALID )
-    return 0;            /* below timer resolution */
-
-  /*
-   *  Convert 1/2-microsecond count into microseconds
-   */
-
-  return (total - AVG_OVERHEAD) >> 1;
-}
-
-void benchmark_timer_disable_subtracting_average_overhead(
-  bool find_flag
-)
-{
-  benchmark_timer_find_average_overhead = find_flag;
-}
diff --git a/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.S b/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.S
deleted file mode 100644
index 1fe3931..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/timer/timerisr.S
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Handle 68302 TIMER2 interrupts.
- *
- * All code in this routine is pure overhead which can perturb the
- * accuracy of RTEMS' timing test suite.
- *
- * See also:	benchmark_timer_read()
- *
- * To reduce overhead this is best to be the "rawest" hardware interupt
- * handler you can write.  This should be the only interrupt which can
- * occur during the measured time period.
- *
- * An external counter, Timer_interrupts, is incremented.
- */
-
-#include <rtems/asm.h>
-
-BEGIN_CODE
-	PUBLIC(timerisr)
-SYM(timerisr):
-	move.w	#0x0040,SYM(m302)+2072	| clear interrupt in-service bit
-	move.b	#3,SYM(m302)+2137	| clear timer interrupt event register
-	addq.l	#1,SYM(Timer_interrupts) | increment timer value
-	rte
-END_CODE
-END
diff --git a/c/src/lib/libbsp/m68k/gen68302/times b/c/src/lib/libbsp/m68k/gen68302/times
deleted file mode 100644
index 4d83992..0000000
--- a/c/src/lib/libbsp/m68k/gen68302/times
+++ /dev/null
@@ -1,189 +0,0 @@
-#
-#  Timing Test Suite Results for the generic 68302 BSP
-#
-
-NOTE:  This BSP is used submitted and no information is currently available. 
-
-Board:                gen68302
-CPU:                  Motorola 68302
-Clock Speed:          16 Mhz
-Memory Configuration: SRAM, DRAM, cache, etc
-Wait States:          
-
-Times Reported in:    cycles, microseconds, etc
-Timer Source:         Count Down Timer, on-CPU cycle counter, etc
-
-Column A:             unused
-Column B:             unused
-
-#                          DESCRIPTION                                 A    B
-== =================================================================  ==== ====
- 1 rtems_semaphore_create                                               20
-   rtems_semaphore_delete                                               21
-   rtems_semaphore_obtain: available                                    15
-   rtems_semaphore_obtain: not available -- NO_WAIT                     15
-   rtems_semaphore_release: no waiting tasks                            16
-
- 2 rtems_semaphore_obtain: not available -- caller blocks               62
-
- 3 rtems_semaphore_release: task readied -- preempts caller             55
-
- 4 rtems_task_restart: blocked task -- preempts caller                  77
-   rtems_task_restart: ready task -- preempts caller                    70
-   rtems_semaphore_release: task readied -- returns to caller           25
-   rtems_task_create                                                    57
-   rtems_task_start                                                     31
-   rtems_task_restart: suspended task -- returns to caller              36
-   rtems_task_delete: suspended task                                    47
-   rtems_task_restart: ready task -- returns to caller                  37
-   rtems_task_restart: blocked task -- returns to caller                46
-   rtems_task_delete: blocked task                                      50
-
- 5 rtems_task_suspend: calling task                                     51
-   rtems_task_resume: task readied -- preempts caller                   49
-
- 6 rtems_task_restart: calling task                                     59
-   rtems_task_suspend: returns to caller                                18
-   rtems_task_resume: task readied -- returns to caller                 19
-   rtems_task_delete: ready task                                        50
-
- 7 rtems_task_restart: suspended task -- preempts caller                70
-
- 8 rtems_task_set_priority: obtain current priority                     12
-   rtems_task_set_priority: returns to caller                           27
-   rtems_task_mode: obtain current mode                                  5
-   rtems_task_mode: no reschedule                                        5
-   rtems_task_mode: reschedule -- returns to caller                      8
-   rtems_task_mode: reschedule -- preempts caller                       39
-   rtems_clock_set                                                      33
-   rtems_clock_get                                                       3
-
- 9 rtems_message_queue_create                                          110
-   rtems_message_queue_send: no waiting tasks                           37
-   rtems_message_queue_urgent: no waiting tasks                         37
-   rtems_message_queue_receive: available                               31
-   rtems_message_queue_flush: no messages flushed                       12
-   rtems_message_queue_flush: messages flushed                          16
-   rtems_message_queue_delete                                           26
-
-10 rtems_message_queue_receive: not available -- NO_WAIT                15
-   rtems_message_queue_receive: not available -- caller blocks          62
-
-11 rtems_message_queue_send: task readied -- preempts caller            72
-
-12 rtems_message_queue_send: task readied -- returns to caller          39
-
-13 rtems_message_queue_urgent: task readied -- preempts caller          72
-
-14 rtems_message_queue_urgent: task readied -- returns to caller        39
-
-15 rtems_event_receive: obtain current events                            1
-   rtems_event_receive: not available -- NO_WAIT                        12
-   rtems_event_receive: not available -- caller blocks                  56
-   rtems_event_send: no task readied                                    12
-   rtems_event_receive: available                                       12
-   rtems_event_send: task readied -- returns to caller                  24
-
-16 rtems_event_send: task readied -- preempts caller                    55
-
-17 rtems_task_set_priority: preempts caller                             62
-
-18 rtems_task_delete: calling task                                      83
-
-19 rtems_signal_catch                                                    9
-   rtems_signal_send: returns to caller                                 15
-   rtems_signal_send: signal to self                                    18
-   exit ASR overhead: returns to calling task                           22
-   exit ASR overhead: returns to preempting task                        49
-
-20 rtems_partition_create                                               35
-   rtems_region_create                                                  23
-   rtems_partition_get_buffer: available                                15
-   rtems_partition_get_buffer: not available                            13
-   rtems_partition_return_buffer                                        18
-   rtems_partition_delete                                               16
-   rtems_region_get_segment: available                                  22
-   rtems_region_get_segment: not available -- NO_WAIT                   21
-   rtems_region_return_segment: no waiting tasks                        19
-   rtems_region_get_segment: not available -- caller blocks             64
-   rtems_region_return_segment: task readied -- preempts caller         74
-   rtems_region_return_segment: task readied -- returns to caller       44
-   rtems_region_delete                                                  16
-   rtems_io_initialize                                                   2
-   rtems_io_open                                                         1
-   rtems_io_close                                                        1
-   rtems_io_read                                                         1
-   rtems_io_write                                                        1
-   rtems_io_control                                                      1
-
-21 rtems_task_ident                                                    149
-   rtems_message_queue_ident                                           145
-   rtems_semaphore_ident                                               156
-   rtems_partition_ident                                               145
-   rtems_region_ident                                                  148
-   rtems_port_ident                                                    145
-   rtems_timer_ident                                                   145
-   rtems_rate_monotonic_ident                                          145
-
-22 rtems_message_queue_broadcast: task readied -- returns to caller     42
-   rtems_message_queue_broadcast: no waiting tasks                      17
-   rtems_message_queue_broadcast: task readied -- preempts caller       78
-
-23 rtems_timer_create                                                   14
-   rtems_timer_fire_after: inactive                                     22
-   rtems_timer_fire_after: active                                       24
-   rtems_timer_cancel: active                                           15
-   rtems_timer_cancel: inactive                                         13
-   rtems_timer_reset: inactive                                          21
-   rtems_timer_reset: active                                            23
-   rtems_timer_fire_when: inactive                                      34
-   rtems_timer_fire_when: active                                        34
-   rtems_timer_delete: active                                           19
-   rtems_timer_delete: inactive                                         17
-   rtems_task_wake_when                                                 69
-
-24 rtems_task_wake_after: yield -- returns to caller                     9
-   rtems_task_wake_after: yields -- preempts caller                     45
-
-25 rtems_clock_tick                                                      4
-
-26 _ISR_Disable                                                          0
-   _ISR_Flash                                                            1
-   _ISR_Enable                                                           1
-   _Thread_Disable_dispatch                                              0
-   _Thread_Enable_dispatch                                               7
-   _Thread_Set_state                                                    11
-   _Thread_Disptach (NO FP)                                             31
-   context switch: no floating point contexts                           21
-   context switch: self                                                 10
-   context switch: to another task                                      10
-   context switch: restore 1st FP task                                  25
-   fp context switch: save idle, restore idle                           31
-   fp context switch: save idle, restore initialized                    19
-   fp context switch: save initialized, restore initialized             20
-   _Thread_Resume                                                        7
-   _Thread_Unblock                                                       7
-   _Thread_Ready                                                         9
-   _Thread_Get                                                           4
-   _Semaphore_Get                                                        2
-   _Thread_Get: invalid id                                               0
-
-27 interrupt entry overhead: returns to interrupted task                 6
-   interrupt exit overhead: returns to interrupted task                  6
-   interrupt entry overhead: returns to nested interrupt                 6
-   interrupt exit overhead: returns to nested interrupt                  5
-   interrupt entry overhead: returns to preempting task                  7
-   interrupt exit overhead: returns to preempting task                  36
-
-28 rtems_port_create                                                    16
-   rtems_port_external_to_internal                                      11
-   rtems_port_internal_to_external                                      11
-   rtems_port_delete                                                    16
-
-29 rtems_rate_monotonic_create                                          15
-   rtems_rate_monotonic_period: initiate period -- returns to caller    21
-   rtems_rate_monotonic_period: obtain status                           13
-   rtems_rate_monotonic_cancel                                          16
-   rtems_rate_monotonic_delete: inactive                                18
-   rtems_rate_monotonic_delete: active                                  20
-   rtems_rate_monotonic_period: conclude periods -- caller blocks       53




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