[rtems commit] bsp/imx: Add register headers
Sebastian Huber
sebh at rtems.org
Tue Sep 26 05:32:12 UTC 2017
Module: rtems
Branch: master
Commit: 4bf2ce3115a532a173cb34f20bedf186d897db8b
Changeset: http://git.rtems.org/rtems/commit/?id=4bf2ce3115a532a173cb34f20bedf186d897db8b
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Tue Sep 26 07:31:29 2017 +0200
bsp/imx: Add register headers
Update #3090.
---
c/src/lib/libbsp/arm/imx/Makefile.am | 2 +
.../imx/include/arm/freescale/imx/imx_ecspireg.h | 111 +++++++++++++++++++++
.../arm/imx/include/arm/freescale/imx/imx_i2creg.h | 50 ++++++++++
c/src/lib/libbsp/arm/imx/preinstall.am | 8 ++
4 files changed, 171 insertions(+)
diff --git a/c/src/lib/libbsp/arm/imx/Makefile.am b/c/src/lib/libbsp/arm/imx/Makefile.am
index dea1ef8..e206614 100644
--- a/c/src/lib/libbsp/arm/imx/Makefile.am
+++ b/c/src/lib/libbsp/arm/imx/Makefile.am
@@ -41,7 +41,9 @@ include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/arm-cp15.h
include_arm_freescale_imx_HEADERS =
include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_ccmvar.h
+include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_ecspireg.h
include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_gpcreg.h
+include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_i2creg.h
include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_srcreg.h
include_arm_freescale_imx_HEADERS += include/arm/freescale/imx/imx_uartreg.h
diff --git a/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_ecspireg.h b/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_ecspireg.h
new file mode 100644
index 0000000..299ed2b
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_ecspireg.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef IMX_ECSPIREG_H
+#define IMX_ECSPIREG_H
+
+#include <bsp/utility.h>
+
+typedef struct {
+ uint32_t rxdata;
+ uint32_t txdata;
+ uint32_t conreg;
+#define IMX_ECSPI_CONREG_BURST_LENGTH(val) BSP_FLD32(val, 20, 31)
+#define IMX_ECSPI_CONREG_BURST_LENGTH_GET(reg) BSP_FLD32GET(reg, 20, 31)
+#define IMX_ECSPI_CONREG_BURST_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 20, 31)
+#define IMX_ECSPI_CONREG_CHANNEL_SELECT(val) BSP_FLD32(val, 18, 19)
+#define IMX_ECSPI_CONREG_CHANNEL_SELECT_GET(reg) BSP_FLD32GET(reg, 18, 19)
+#define IMX_ECSPI_CONREG_CHANNEL_SELECT_SET(reg, val) BSP_FLD32SET(reg, val, 18, 19)
+#define IMX_ECSPI_CONREG_DRCTL(val) BSP_FLD32(val, 16, 17)
+#define IMX_ECSPI_CONREG_DRCTL_GET(reg) BSP_FLD32GET(reg, 16, 17)
+#define IMX_ECSPI_CONREG_DRCTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 17)
+#define IMX_ECSPI_CONREG_PRE_DIVIDER(val) BSP_FLD32(val, 12, 15)
+#define IMX_ECSPI_CONREG_PRE_DIVIDER_GET(reg) BSP_FLD32GET(reg, 12, 15)
+#define IMX_ECSPI_CONREG_PRE_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
+#define IMX_ECSPI_CONREG_POST_DIVIDER(val) BSP_FLD32(val, 8, 11)
+#define IMX_ECSPI_CONREG_POST_DIVIDER_GET(reg) BSP_FLD32GET(reg, 8, 11)
+#define IMX_ECSPI_CONREG_POST_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
+#define IMX_ECSPI_CONREG_CHANNEL_MODE(val) BSP_FLD32(val, 4, 7)
+#define IMX_ECSPI_CONREG_CHANNEL_MODE_GET(reg) BSP_FLD32GET(reg, 4, 7)
+#define IMX_ECSPI_CONREG_CHANNEL_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
+#define IMX_ECSPI_CONREG_SMC BSP_BIT32(3)
+#define IMX_ECSPI_CONREG_XCH BSP_BIT32(2)
+#define IMX_ECSPI_CONREG_HT BSP_BIT32(1)
+#define IMX_ECSPI_CONREG_EN BSP_BIT32(0)
+ uint32_t configreg;
+#define IMX_ECSPI_CONFIGREG_HT_LENGTH(val) BSP_FLD32(val, 24, 28)
+#define IMX_ECSPI_CONFIGREG_HT_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 28)
+#define IMX_ECSPI_CONFIGREG_HT_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 28)
+#define IMX_ECSPI_CONFIGREG_SCLK_CTL(val) BSP_FLD32(val, 20, 23)
+#define IMX_ECSPI_CONFIGREG_SCLK_CTL_GET(reg) BSP_FLD32GET(reg, 20, 23)
+#define IMX_ECSPI_CONFIGREG_SCLK_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 20, 23)
+#define IMX_ECSPI_CONFIGREG_DATA_CTL(val) BSP_FLD32(val, 16, 19)
+#define IMX_ECSPI_CONFIGREG_DATA_CTL_GET(reg) BSP_FLD32GET(reg, 16, 19)
+#define IMX_ECSPI_CONFIGREG_DATA_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19)
+#define IMX_ECSPI_CONFIGREG_SS_POL(val) BSP_FLD32(val, 12, 15)
+#define IMX_ECSPI_CONFIGREG_SS_POL_GET(reg) BSP_FLD32GET(reg, 12, 15)
+#define IMX_ECSPI_CONFIGREG_SS_POL_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
+#define IMX_ECSPI_CONFIGREG_SS_CTL(val) BSP_FLD32(val, 8, 11)
+#define IMX_ECSPI_CONFIGREG_SS_CTL_GET(reg) BSP_FLD32GET(reg, 8, 11)
+#define IMX_ECSPI_CONFIGREG_SS_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
+#define IMX_ECSPI_CONFIGREG_SCLK_POL(val) BSP_FLD32(val, 4, 7)
+#define IMX_ECSPI_CONFIGREG_SCLK_POL_GET(reg) BSP_FLD32GET(reg, 4, 7)
+#define IMX_ECSPI_CONFIGREG_SCLK_POL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
+#define IMX_ECSPI_CONFIGREG_SCLK_PHA(val) BSP_FLD32(val, 0, 3)
+#define IMX_ECSPI_CONFIGREG_SCLK_PHA_GET(reg) BSP_FLD32GET(reg, 0, 3)
+#define IMX_ECSPI_CONFIGREG_SCLK_PHA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
+#define IMX_ECSPI_TC BSP_BIT32(7)
+#define IMX_ECSPI_RO BSP_BIT32(6)
+#define IMX_ECSPI_RF BSP_BIT32(5)
+#define IMX_ECSPI_RDR BSP_BIT32(4)
+#define IMX_ECSPI_RR BSP_BIT32(3)
+#define IMX_ECSPI_TF BSP_BIT32(2)
+#define IMX_ECSPI_TDR BSP_BIT32(1)
+#define IMX_ECSPI_TE BSP_BIT32(0)
+ uint32_t intreg;
+ uint32_t dmareg;
+#define IMX_ECSPI_DMAREG_RXTDEN BSP_BIT32(31)
+#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH(val) BSP_FLD32(val, 24, 29)
+#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 29)
+#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 29)
+#define IMX_ECSPI_DMAREG_RXDEN BSP_BIT32(23)
+#define IMX_ECSPI_DMAREG_RX_THRESHOLD(val) BSP_FLD32(val, 16, 21)
+#define IMX_ECSPI_DMAREG_RX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 16, 21)
+#define IMX_ECSPI_DMAREG_RX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
+#define IMX_ECSPI_DMAREG_TEDEN BSP_BIT32(7)
+#define IMX_ECSPI_DMAREG_TX_THRESHOLD(val) BSP_FLD32(val, 0, 5)
+#define IMX_ECSPI_DMAREG_TX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 0, 5)
+#define IMX_ECSPI_DMAREG_TX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
+ uint32_t statreg;
+ uint32_t periodreg;
+#define IMX_ECSPI_PERIODREG_CSD_CTL(val) BSP_FLD32(val, 16, 21)
+#define IMX_ECSPI_PERIODREG_CSD_CTL_GET(reg) BSP_FLD32GET(reg, 16, 21)
+#define IMX_ECSPI_PERIODREG_CSD_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
+#define IMX_ECSPI_PERIODREG_CSRC BSP_BIT32(15)
+#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD(val) BSP_FLD32(val, 0, 14)
+#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_GET(reg) BSP_FLD32GET(reg, 0, 14)
+#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 14)
+ uint32_t testreg;
+#define IMX_ECSPI_TESTREG_LBC BSP_BIT32(31)
+#define IMX_ECSPI_TESTREG_RXCNT(val) BSP_FLD32(val, 8, 14)
+#define IMX_ECSPI_TESTREG_RXCNT_GET(reg) BSP_FLD32GET(reg, 8, 14)
+#define IMX_ECSPI_TESTREG_RXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 14)
+#define IMX_ECSPI_TESTREG_TXCNT(val) BSP_FLD32(val, 0, 6)
+#define IMX_ECSPI_TESTREG_TXCNT_GET(reg) BSP_FLD32GET(reg, 0, 6)
+#define IMX_ECSPI_TESTREG_TXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 6)
+ uint32_t reserved_24[7];
+ uint32_t msgdata;
+} imx_ecspi;
+
+#endif /* IMX_ECSPIREG_H */
diff --git a/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_i2creg.h b/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_i2creg.h
new file mode 100644
index 0000000..52201c7
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/include/arm/freescale/imx/imx_i2creg.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef IMX_I2CREG_H
+#define IMX_I2CREG_H
+
+#include <bsp/utility.h>
+
+typedef struct {
+ uint32_t iadr;
+#define IMX_I2C_IADR_ADR(val) BSP_FLD32(val, 1, 7)
+#define IMX_I2C_IADR_ADR_GET(reg) BSP_FLD32GET(reg, 1, 7)
+#define IMX_I2C_IADR_ADR_SET(reg, val) BSP_FLD32SET(reg, val, 1, 7)
+ uint32_t ifdr;
+#define IMX_I2C_IFDR_IC(val) BSP_FLD32(val, 0, 5)
+#define IMX_I2C_IFDR_IC_GET(reg) BSP_FLD32GET(reg, 0, 5)
+#define IMX_I2C_IFDR_IC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
+ uint32_t i2cr;
+#define IMX_I2C_I2CR_IEN BSP_BIT32(7)
+#define IMX_I2C_I2CR_IIEN BSP_BIT32(6)
+#define IMX_I2C_I2CR_MSTA BSP_BIT32(5)
+#define IMX_I2C_I2CR_MTX BSP_BIT32(4)
+#define IMX_I2C_I2CR_TXAK BSP_BIT32(3)
+#define IMX_I2C_I2CR_RSTA BSP_BIT32(2)
+ uint32_t i2sr;
+#define IMX_I2C_I2SR_ICF BSP_BIT32(7)
+#define IMX_I2C_I2SR_IAAS BSP_BIT32(6)
+#define IMX_I2C_I2SR_IBB BSP_BIT32(5)
+#define IMX_I2C_I2SR_IAL BSP_BIT32(4)
+#define IMX_I2C_I2SR_SRW BSP_BIT32(2)
+#define IMX_I2C_I2SR_IIF BSP_BIT32(1)
+#define IMX_I2C_I2SR_RXAK BSP_BIT32(0)
+ uint32_t i2dr;
+#define IMX_I2C_I2DR_DATA(val) BSP_FLD32(val, 0, 7)
+#define IMX_I2C_I2DR_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7)
+#define IMX_I2C_I2DR_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
+} imx_i2c;
+
+#endif /* IMX_I2CREG_H */
diff --git a/c/src/lib/libbsp/arm/imx/preinstall.am b/c/src/lib/libbsp/arm/imx/preinstall.am
index 6b3d589..68504cf 100644
--- a/c/src/lib/libbsp/arm/imx/preinstall.am
+++ b/c/src/lib/libbsp/arm/imx/preinstall.am
@@ -135,10 +135,18 @@ $(PROJECT_INCLUDE)/arm/freescale/imx/imx_ccmvar.h: include/arm/freescale/imx/imx
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/arm/freescale/imx/imx_ccmvar.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/arm/freescale/imx/imx_ccmvar.h
+$(PROJECT_INCLUDE)/arm/freescale/imx/imx_ecspireg.h: include/arm/freescale/imx/imx_ecspireg.h $(PROJECT_INCLUDE)/arm/freescale/imx/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/arm/freescale/imx/imx_ecspireg.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/arm/freescale/imx/imx_ecspireg.h
+
$(PROJECT_INCLUDE)/arm/freescale/imx/imx_gpcreg.h: include/arm/freescale/imx/imx_gpcreg.h $(PROJECT_INCLUDE)/arm/freescale/imx/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/arm/freescale/imx/imx_gpcreg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/arm/freescale/imx/imx_gpcreg.h
+$(PROJECT_INCLUDE)/arm/freescale/imx/imx_i2creg.h: include/arm/freescale/imx/imx_i2creg.h $(PROJECT_INCLUDE)/arm/freescale/imx/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/arm/freescale/imx/imx_i2creg.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/arm/freescale/imx/imx_i2creg.h
+
$(PROJECT_INCLUDE)/arm/freescale/imx/imx_srcreg.h: include/arm/freescale/imx/imx_srcreg.h $(PROJECT_INCLUDE)/arm/freescale/imx/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/arm/freescale/imx/imx_srcreg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/arm/freescale/imx/imx_srcreg.h
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