[rtems commit] epiphany: Fixes for GCC 7.3
Sebastian Huber
sebh at rtems.org
Wed Jan 31 07:03:50 UTC 2018
Module: rtems
Branch: master
Commit: 9819425feecd8d06de1baaf8a8e07f7151623648
Changeset: http://git.rtems.org/rtems/commit/?id=9819425feecd8d06de1baaf8a8e07f7151623648
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Wed Jan 31 08:02:21 2018 +0100
epiphany: Fixes for GCC 7.3
GCC 7.3 defines __USER_LABEL_PREFIX__ to nothing.
---
.../lib/libbsp/epiphany/epiphany_sim/start/start.S | 20 ++++++++--------
.../libbsp/epiphany/epiphany_sim/startup/linkcmds | 28 +++++++++++-----------
.../score/cpu/epiphany/epiphany-context-switch.S | 5 ++--
.../cpu/epiphany/epiphany-exception-handler.S | 20 ++++++++--------
4 files changed, 36 insertions(+), 37 deletions(-)
diff --git a/c/src/lib/libbsp/epiphany/epiphany_sim/start/start.S b/c/src/lib/libbsp/epiphany/epiphany_sim/start/start.S
index 002cb3b..7f828ae 100644
--- a/c/src/lib/libbsp/epiphany/epiphany_sim/start/start.S
+++ b/c/src/lib/libbsp/epiphany/epiphany_sim/start/start.S
@@ -28,19 +28,19 @@
EXTERN(bsp_section_bss_begin)
EXTERN(bsp_section_bss_end)
-EXTERN(ISR_Handler)
+EXTERN(_ISR_Handler)
EXTERN(bsp_start_vector_table_end)
EXTERN(bsp_start_vector_table_size)
EXTERN(bsp_vector_table_size)
EXTERN(bsp_section_stack_begin)
-PUBLIC(EPIPHANY_Exception_default)
+PUBLIC(_EPIPHANY_Exception_default)
PUBLIC(bsp_start_vector_table_begin)
-PUBLIC(start)
+PUBLIC(_start)
.section .vector, "wax"
-TYPE_FUNC(start)
-SYM(start):
+TYPE_FUNC(_start)
+SYM(_start):
.balign 4 ;
b .normal_start
@@ -71,7 +71,7 @@ SYM(start):
.balign 4 ; 0x24
b _EPIPHANY_Exception_default
-_bsp_start_vector_table_begin:
+bsp_start_vector_table_begin:
.word .normal_start /* Reset */
.word _EPIPHANY_Exception_default /* SW exception */
.word _EPIPHANY_Exception_default /* Data Page Fault */
@@ -117,8 +117,8 @@ _bss_clear_loop:
_jump_to_c:
/* Jump to bootcard */
- mov r3, %low(_boot_card)
- movt r3, %high(_boot_card)
+ mov r3, %low(boot_card)
+ movt r3, %high(boot_card)
jalr r3
/* Should never reach here */
@@ -162,6 +162,6 @@ _jump_to_c:
jr r63
.balign 4
-TYPE_FUNC(EPIPHANY_Exception_default)
-SYM(EPIPHANY_Exception_default):
+TYPE_FUNC(_EPIPHANY_Exception_default)
+SYM(_EPIPHANY_Exception_default):
idle
diff --git a/c/src/lib/libbsp/epiphany/epiphany_sim/startup/linkcmds b/c/src/lib/libbsp/epiphany/epiphany_sim/startup/linkcmds
index 31e31be..07a4c29 100644
--- a/c/src/lib/libbsp/epiphany/epiphany_sim/startup/linkcmds
+++ b/c/src/lib/libbsp/epiphany/epiphany_sim/startup/linkcmds
@@ -143,21 +143,21 @@ SECTIONS {
*(.gcc_except_table .gcc_except_table.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tdata : {
- __TLS_Data_begin = .;
+ _TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
- __TLS_Data_end = .;
+ _TLS_Data_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tbss : {
- __TLS_BSS_begin = .;
+ _TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
- __TLS_BSS_end = .;
+ _TLS_BSS_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
- __TLS_Data_size = __TLS_Data_end - __TLS_Data_begin;
- __TLS_Data_begin = __TLS_Data_size != 0 ? __TLS_Data_begin : __TLS_BSS_begin;
- __TLS_Data_end = __TLS_Data_size != 0 ? __TLS_Data_end : __TLS_BSS_begin;
- __TLS_BSS_size = __TLS_BSS_end - __TLS_BSS_begin;
- __TLS_Size = __TLS_BSS_end - __TLS_Data_begin;
- __TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+ _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+ _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+ _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+ _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+ _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+ _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.preinit_array : {
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
@@ -363,8 +363,8 @@ SECTIONS {
} > REGION_STACK AT > REGION_STACK
bsp_section_stack_size = bsp_section_stack_begin - bsp_section_stack_end;
- _RamBase = ORIGIN (REGION_WORK);
- _RamSize = LENGTH (REGION_WORK);
- _WorkAreaBase = bsp_section_work_begin;
- _HeapSize = 0;
+ RamBase = ORIGIN (REGION_WORK);
+ RamSize = LENGTH (REGION_WORK);
+ WorkAreaBase = bsp_section_work_begin;
+ HeapSize = 0;
}
diff --git a/cpukit/score/cpu/epiphany/epiphany-context-switch.S b/cpukit/score/cpu/epiphany/epiphany-context-switch.S
index 6d08389..40744d1 100644
--- a/cpukit/score/cpu/epiphany/epiphany-context-switch.S
+++ b/cpukit/score/cpu/epiphany/epiphany-context-switch.S
@@ -39,7 +39,6 @@ PUBLIC(_CPU_Context_switch)
PUBLIC(_CPU_Context_restore)
PUBLIC(_CPU_Context_restore_fp)
PUBLIC(_CPU_Context_save_fp)
-PUBLIC(restore)
SYM(_CPU_Context_switch):
/* Disable interrupts and store all registers */
@@ -122,7 +121,7 @@ SYM(_CPU_Context_switch):
movfs r27, iret
str r27, [r0,66]
-SYM(restore):
+.Lrestore:
/* r1 contains buffer address, skip it */
ldr r2, [r1,2]
@@ -205,7 +204,7 @@ SYM(restore):
SYM(_CPU_Context_restore):
mov r1, r0
- b _restore
+ b .Lrestore
nop
/* No FP support for Epiphany yet */
diff --git a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
index 09c88fd..23f0947 100644
--- a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
+++ b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
@@ -43,12 +43,12 @@
EXTERN(bsp_start_vector_table_begin)
EXTERN(_Thread_Dispatch)
-PUBLIC(ISR_Handler)
+PUBLIC(_ISR_Handler)
.section .text, "ax"
.align 4
-TYPE_FUNC(ISR_Handler)
-SYM(ISR_Handler):
+TYPE_FUNC(_ISR_Handler)
+SYM(_ISR_Handler):
/* Reserve space for CPU_Exception_frame */
sub sp, sp, #(CPU_EXCEPTION_FRAME_SIZE)
@@ -134,8 +134,8 @@ SYM(ISR_Handler):
movfs r1,iret
str r1, [sp,64]
- mov r33, %low(__Per_CPU_Information)
- movt r33, %high(__Per_CPU_Information)
+ mov r33, %low(_Per_CPU_Information)
+ movt r33, %high(_Per_CPU_Information)
add r6, r33, #(PER_CPU_ISR_NEST_LEVEL)
add r8, r33, #(PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)
@@ -151,7 +151,7 @@ SYM(ISR_Handler):
/* Keep sp (Exception frame address) in r32 - Callee saved */
mov r32, sp
- /* Keep __Per_CPU_Information address in r33 - Callee saved */
+ /* Keep _Per_CPU_Information address in r33 - Callee saved */
mov r33, r18
/* Call the exception handler from vector table.
@@ -163,7 +163,7 @@ SYM(ISR_Handler):
mov r27, r62
lsl r27, r27, #2
- mov r26, %low(_bsp_start_vector_table_begin)
+ mov r26, %low(bsp_start_vector_table_begin)
movt r15, #0
add r27, r27, r26
ldr r27, [r27]
@@ -184,7 +184,7 @@ jump_to_c_handler:
/* Switch back to the interrupted task stack */
mov sp, r32
- /* Get the address of __Per_CPU_Information */
+ /* Get the address of _Per_CPU_Information */
mov r18, r33
/* Decrement nesting level and enable multitasking */
@@ -213,8 +213,8 @@ jump_to_c_handler:
sub r35, r31, #0
beq exception_frame_restore
- mov r35, %low(__Thread_Dispatch)
- movt r35, %high(__Thread_Dispatch)
+ mov r35, %low(_Thread_Dispatch)
+ movt r35, %high(_Thread_Dispatch)
jalr r35
exception_frame_restore:
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