[rtems commit] bsp/riscv: Fix HTIF warnings

Sebastian Huber sebh at rtems.org
Wed Jul 25 08:10:50 UTC 2018


Module:    rtems
Branch:    master
Commit:    7fe48551a2b6d406ad6ad7f3a938651c7b5089b8
Changeset: http://git.rtems.org/rtems/commit/?id=7fe48551a2b6d406ad6ad7f3a938651c7b5089b8

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Thu Jul 19 13:58:12 2018 +0200

bsp/riscv: Fix HTIF warnings

Update #3433.

---

 bsps/riscv/riscv/console/console-config.c |  8 +++---
 bsps/riscv/riscv/console/htif.c           |  6 +++++
 bsps/riscv/riscv/headers.am               |  1 +
 bsps/riscv/riscv/include/bsp/riscv.h      | 43 +++++++++++++++++++++++++++++++
 bsps/riscv/riscv/start/bsp_fatal_halt.c   |  9 +++++--
 5 files changed, 62 insertions(+), 5 deletions(-)

diff --git a/bsps/riscv/riscv/console/console-config.c b/bsps/riscv/riscv/console/console-config.c
index 6847dee..50d292d 100644
--- a/bsps/riscv/riscv/console/console-config.c
+++ b/bsps/riscv/riscv/console/console-config.c
@@ -27,7 +27,7 @@
 
 #include <libfdt.h>
 
-#if RISCV_ENABLE_HTIF_SUPPORT > 0
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
 static htif_console_context htif_console_instance;
 #endif
 
@@ -97,7 +97,7 @@ static void riscv_console_probe(void)
   node = fdt_next_node(fdt, -1, NULL);
 
   while (node >= 0) {
-#if RISCV_ENABLE_HTIF_SUPPORT
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
     if (fdt_node_check_compatible(fdt, node, "ucb,htif0") == 0) {
       htif_console_context_init(&htif_console_instance.base, node);
 
@@ -175,8 +175,10 @@ rtems_status_code console_initialize(
   void *arg
 )
 {
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
   rtems_termios_device_context *base;
   char htif_path[] = "/dev/ttyShtif";
+#endif
 #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0
   char path[] = "/dev/ttyS?";
   size_t i;
@@ -184,7 +186,7 @@ rtems_status_code console_initialize(
 
   rtems_termios_initialize();
 
-#if RISCV_ENABLE_HTIF_SUPPORT
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
   base = &htif_console_instance.base;
   rtems_termios_device_install(htif_path, &htif_console_handler, NULL, base);
 
diff --git a/bsps/riscv/riscv/console/htif.c b/bsps/riscv/riscv/console/htif.c
index b7cb29c..bcfe6a5 100644
--- a/bsps/riscv/riscv/console/htif.c
+++ b/bsps/riscv/riscv/console/htif.c
@@ -27,6 +27,10 @@
  * SUCH DAMAGE.
  */
 
+#include <bsp/riscv.h>
+
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
+
 #include <dev/serial/htif.h>
 
 #include <assert.h>
@@ -135,3 +139,5 @@ const rtems_termios_device_handler htif_console_handler = {
   .poll_read = htif_console_getchar,
   .mode = TERMIOS_POLLED
 };
+
+#endif /* RISCV_ENABLE_HTIF_SUPPORT */
diff --git a/bsps/riscv/riscv/headers.am b/bsps/riscv/riscv/headers.am
index 9a2828c..eafde2c 100644
--- a/bsps/riscv/riscv/headers.am
+++ b/bsps/riscv/riscv/headers.am
@@ -8,6 +8,7 @@ include_HEADERS += ../../../../../../bsps/riscv/riscv/include/tm27.h
 include_bspdir = $(includedir)/bsp
 include_bsp_HEADERS =
 include_bsp_HEADERS += ../../../../../../bsps/riscv/riscv/include/bsp/irq.h
+include_bsp_HEADERS += ../../../../../../bsps/riscv/riscv/include/bsp/riscv.h
 
 include_dev_irqdir = $(includedir)/dev/irq
 include_dev_irq_HEADERS =
diff --git a/bsps/riscv/riscv/include/bsp/riscv.h b/bsps/riscv/riscv/include/bsp/riscv.h
new file mode 100644
index 0000000..b2b9d24
--- /dev/null
+++ b/bsps/riscv/riscv/include/bsp/riscv.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef BSP_RISCV_H
+#define BSP_RISCV_H
+
+#include <bsp.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
+void htif_poweroff(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BSP_RISCV_H */
diff --git a/bsps/riscv/riscv/start/bsp_fatal_halt.c b/bsps/riscv/riscv/start/bsp_fatal_halt.c
index 64c3079..5c81cac 100644
--- a/bsps/riscv/riscv/start/bsp_fatal_halt.c
+++ b/bsps/riscv/riscv/start/bsp_fatal_halt.c
@@ -26,10 +26,15 @@
  * SUCH DAMAGE.
  */
 
-#include <bsp.h>
+#include <bsp/riscv.h>
 
-/* Send a power-off signal to the host */
 void _CPU_Fatal_halt(uint32_t source, uint32_t error)
 {
+#if RISCV_ENABLE_HTIF_SUPPORT != 0
   htif_poweroff();
+#endif
+
+  while (true) {
+    /* Do nothing */
+  }
 }



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