[rtems commit] build: Enable RISC-V SMP build

Sebastian Huber sebh at rtems.org
Fri Jun 29 09:56:37 UTC 2018


Module:    rtems
Branch:    master
Commit:    853c5ef890ef846f23784f94fc324319ce976e9d
Changeset: http://git.rtems.org/rtems/commit/?id=853c5ef890ef846f23784f94fc324319ce976e9d

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Fri May 11 06:25:47 2018 +0200

build: Enable RISC-V SMP build

Update #3433.

---

 aclocal/enable-smp.m4        | 2 +-
 c/src/aclocal/enable-smp.m4  | 2 +-
 cpukit/aclocal/enable-smp.m4 | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/aclocal/enable-smp.m4 b/aclocal/enable-smp.m4
index e6461de..b876792 100644
--- a/aclocal/enable-smp.m4
+++ b/aclocal/enable-smp.m4
@@ -8,7 +8,7 @@ AC_ARG_ENABLE(smp,
 [case "${enableval}" in
   yes) test -z $enable_rtemsbsp && AC_MSG_ERROR([SMP requires BSPs to be provided, none have, see --enable-rtemsbsp])
        case "${RTEMS_CPU}" in
-         arm|powerpc|sparc|i386) RTEMS_HAS_SMP=yes ;;
+         arm|powerpc|riscv*|sparc|i386) RTEMS_HAS_SMP=yes ;;
          *)          RTEMS_HAS_SMP=no ;;
        esac
        ;;
diff --git a/c/src/aclocal/enable-smp.m4 b/c/src/aclocal/enable-smp.m4
index 590a7b1..1448a2e 100644
--- a/c/src/aclocal/enable-smp.m4
+++ b/c/src/aclocal/enable-smp.m4
@@ -7,7 +7,7 @@ AC_ARG_ENABLE(smp,
 (SMP)])],
 [case "${enableval}" in 
   yes) case "${RTEMS_CPU}" in
-         arm|powerpc|sparc|i386) RTEMS_HAS_SMP=yes ;;
+         arm|powerpc|riscv*|sparc|i386) RTEMS_HAS_SMP=yes ;;
          *)          RTEMS_HAS_SMP=no ;;
        esac
        ;;
diff --git a/cpukit/aclocal/enable-smp.m4 b/cpukit/aclocal/enable-smp.m4
index 590a7b1..1448a2e 100644
--- a/cpukit/aclocal/enable-smp.m4
+++ b/cpukit/aclocal/enable-smp.m4
@@ -7,7 +7,7 @@ AC_ARG_ENABLE(smp,
 (SMP)])],
 [case "${enableval}" in 
   yes) case "${RTEMS_CPU}" in
-         arm|powerpc|sparc|i386) RTEMS_HAS_SMP=yes ;;
+         arm|powerpc|riscv*|sparc|i386) RTEMS_HAS_SMP=yes ;;
          *)          RTEMS_HAS_SMP=no ;;
        esac
        ;;



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