[rtems commit] bsp/riscv: Add new BSP variants

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    f3da074a120b644da501152c5ccb08c5fd5bd19c
Changeset: http://git.rtems.org/rtems/commit/?id=f3da074a120b644da501152c5ccb08c5fd5bd19c

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Fri Jun 22 07:10:44 2018 +0200

bsp/riscv: Add new BSP variants

The latest RISC-V tool chain introduced new multilib variants. Add
corresponding BSP variants.

Update #3433.

---

 bsps/riscv/riscv/config/rv32imafd.cfg         | 9 +++++++++
 bsps/riscv/riscv/config/rv64imac_medany.cfg   | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafd.cfg         | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafd_medany.cfg  | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafdc_medany.cfg | 9 +++++++++
 5 files changed, 45 insertions(+)

diff --git a/bsps/riscv/riscv/config/rv32imafd.cfg b/bsps/riscv/riscv/config/rv32imafd.cfg
new file mode 100644
index 0000000..471f5ee
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv32imafd.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv32imafd -mabi=ilp32d
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imac_medany.cfg b/bsps/riscv/riscv/config/rv64imac_medany.cfg
new file mode 100644
index 0000000..f7ab9ff
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imac_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imac -mabi=lp64 -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafd.cfg b/bsps/riscv/riscv/config/rv64imafd.cfg
new file mode 100644
index 0000000..29324a1
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafd.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafd -mabi=lp64d
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafd_medany.cfg b/bsps/riscv/riscv/config/rv64imafd_medany.cfg
new file mode 100644
index 0000000..c43cd4f
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafd_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafdc_medany.cfg b/bsps/riscv/riscv/config/rv64imafdc_medany.cfg
new file mode 100644
index 0000000..b04e78b
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafdc_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafdc -mabi=lp64d -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections