[rtems commit] score: Remove _ISR_Dispatch()
Sebastian Huber
sebh at rtems.org
Thu Nov 8 07:11:07 UTC 2018
Module: rtems
Branch: master
Commit: 4fea054ca575418a4190f0b7876c206382ccfd05
Changeset: http://git.rtems.org/rtems/commit/?id=4fea054ca575418a4190f0b7876c206382ccfd05
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Tue Nov 6 19:34:15 2018 +0100
score: Remove _ISR_Dispatch()
This function was only used on some m68k variants. On these m68k
variants there is no need to use a global symbol. Use a local label
instead.
Remove _ISR_Dispatch() from the architecture-independent layer.
---
bsps/mips/shared/irq/exception.S | 2 +-
cpukit/Makefile.am | 1 -
cpukit/include/rtems/score/isr.h | 15 ---
cpukit/score/cpu/m32c/cpu_asm.c | 106 ---------------------
cpukit/score/cpu/m68k/cpu_asm.S | 10 +-
cpukit/score/cpu/mips/cpu_asm.S | 2 +-
cpukit/score/cpu/moxie/cpu_asm.S | 15 ---
cpukit/score/cpu/no_cpu/cpu_asm.c | 4 +-
cpukit/score/cpu/sparc/cpu.c | 4 +-
cpukit/score/cpu/sparc64/cpu.c | 4 +-
cpukit/score/cpu/sparc64/include/rtems/score/cpu.h | 2 +-
cpukit/score/cpu/sparc64/interrupt.S | 3 +-
12 files changed, 15 insertions(+), 153 deletions(-)
diff --git a/bsps/mips/shared/irq/exception.S b/bsps/mips/shared/irq/exception.S
index 30c733b..54462c6 100644
--- a/bsps/mips/shared/irq/exception.S
+++ b/bsps/mips/shared/irq/exception.S
@@ -372,7 +372,7 @@ _ISR_Handler_cleanup:
/*
* prepare to get out of interrupt
- * return from interrupt (maybe to _ISR_Dispatch)
+ * return from interrupt
*
* LABEL "exit interrupt (simple case):"
* prepare to get out of interrupt
diff --git a/cpukit/Makefile.am b/cpukit/Makefile.am
index 786222b..9a52db7 100644
--- a/cpukit/Makefile.am
+++ b/cpukit/Makefile.am
@@ -1599,7 +1599,6 @@ include $(srcdir)/score/cpu/m32c/headers.am
librtemscpu_a_SOURCES += score/cpu/m32c/context_init.c
librtemscpu_a_SOURCES += score/cpu/m32c/context_switch.S
-librtemscpu_a_SOURCES += score/cpu/m32c/cpu_asm.c
librtemscpu_a_SOURCES += score/cpu/m32c/cpu.c
librtemscpu_a_SOURCES += score/cpu/m32c/m32c-exception-frame-print.c
librtemscpu_a_SOURCES += score/cpu/m32c/varvects.S
diff --git a/cpukit/include/rtems/score/isr.h b/cpukit/include/rtems/score/isr.h
index 58dbb84..f4e2eec 100644
--- a/cpukit/include/rtems/score/isr.h
+++ b/cpukit/include/rtems/score/isr.h
@@ -146,21 +146,6 @@ void _ISR_Handler_initialization ( void );
void _ISR_Handler( void );
/**
- * @brief ISR wrapper for thread dispatcher.
- *
- * This routine provides a wrapper so that the routine
- * @ref _Thread_Dispatch can be invoked when a reschedule is necessary
- * at the end of the outermost interrupt service routine. This
- * wrapper is necessary to establish the processor context needed
- * by _Thread_Dispatch and to save the processor context which is
- * corrupted by _Thread_Dispatch. This context typically consists
- * of registers which are not preserved across routine invocations.
- *
- * @note Typically mplemented in assembly language.
- */
-void _ISR_Dispatch( void );
-
-/**
* @brief Checks if an ISR in progress.
*
* This function returns true if the processor is currently servicing
diff --git a/cpukit/score/cpu/m32c/cpu_asm.c b/cpukit/score/cpu/m32c/cpu_asm.c
deleted file mode 100644
index 16a80b2..0000000
--- a/cpukit/score/cpu/m32c/cpu_asm.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/**
- * @file
- *
- * @brief M32C CPU Assembly File
- */
-
-/* cpu_asm.c ===> cpu_asm.S or cpu_asm.s
- *
- * This file contains the basic algorithms for all assembly code used
- * in an specific CPU port of RTEMS. These algorithms must be implemented
- * in assembly language
- *
- * NOTE: This is supposed to be a .S or .s file NOT a C file.
- *
- * M32C does not yet have interrupt support. When this functionality
- * is written, this file should become obsolete.
- *
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-/*
- * This is supposed to be an assembly file. This means that system.h
- * and cpu.h should not be included in a "real" cpu_asm file. An
- * implementation in assembly should include "cpu_asm.h>
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtems/system.h>
-#include <rtems/score/cpu.h>
-
-void _ISR_Handler(void);
-
-/* void __ISR_Handler()
- *
- * This routine provides the RTEMS interrupt management.
- *
- * M32C Specific Information:
- *
- * Interrupts are not currently supported.
- */
-void _ISR_Handler(void)
-{
- /*
- * This discussion ignores a lot of the ugly details in a real
- * implementation such as saving enough registers/state to be
- * able to do something real. Keep in mind that the goal is
- * to invoke a user's ISR handler which is written in C and
- * uses a certain set of registers.
- *
- * Also note that the exact order is to a large extent flexible.
- * Hardware will dictate a sequence for a certain subset of
- * _ISR_Handler while requirements for setting
- */
-
- /*
- * At entry to "common" _ISR_Handler, the vector number must be
- * available. On some CPUs the hardware puts either the vector
- * number or the offset into the vector table for this ISR in a
- * known place. If the hardware does not give us this information,
- * then the assembly portion of RTEMS for this port will contain
- * a set of distinct interrupt entry points which somehow place
- * the vector number in a known place (which is safe if another
- * interrupt nests this one) and branches to _ISR_Handler.
- *
- * save some or all context on stack
- * may need to save some special interrupt information for exit
- *
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- *
- * _ISR_Nest_level++;
- *
- * _Thread_Dispatch_disable_level++;
- *
- * (*_ISR_Vector_table[ vector ])( vector );
- *
- * _Thread_Dispatch_disable_level--;
- *
- * --_ISR_Nest_level;
- *
- * if ( _ISR_Nest_level )
- * goto the label "exit interrupt (simple case)"
- *
- * if ( _Thread_Dispatch_disable_level )
- * goto the label "exit interrupt (simple case)"
- *
- * if ( _Thread_Dispatch_necessary ) {
- * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
- * prepare to get out of interrupt
- * return from interrupt (maybe to _ISR_Dispatch)
- *
- * LABEL "exit interrupt (simple case):
- * if outermost interrupt
- * restore stack
- * prepare to get out of interrupt
- * return from interrupt
- */
-}
diff --git a/cpukit/score/cpu/m68k/cpu_asm.S b/cpukit/score/cpu/m68k/cpu_asm.S
index 6ec89d8..3c16e62 100644
--- a/cpukit/score/cpu/m68k/cpu_asm.S
+++ b/cpukit/score/cpu/m68k/cpu_asm.S
@@ -324,7 +324,7 @@ bframe:
#if ( M68K_HAS_SEPARATE_STACKS == 1 )
movec msp,a0 | a0 = master stack pointer
movew #0,a0 at - | push format word
- movel #SYM(_ISR_Dispatch),a0 at - | push return addr
+ movel #thread_dispatch,a0 at - | push return addr
movew a0@(6),a0 at - | push saved sr
movec a0,msp | set master stack pointer
#else
@@ -344,8 +344,8 @@ exit: moveml a7@,d0-d1/a0-a1 | restore d0-d1,a0-a1
rte | return to thread
| OR _Isr_dispatch
-/*void _ISR_Dispatch()
- *
+#if ( M68K_HAS_SEPARATE_STACKS == 1 )
+/*
* Entry point from the outermost interrupt service routine exit.
* The current stack is the supervisor mode stack if this processor
* has separate stacks.
@@ -357,8 +357,7 @@ exit: moveml a7@,d0-d1/a0-a1 | restore d0-d1,a0-a1
* 4. return from interrupt
*/
- .global SYM (_ISR_Dispatch)
-SYM (_ISR_Dispatch):
+thread_dispatch:
#if ( !defined(__mcoldfire__) )
movml d0-d1/a0-a1,a7 at -
jsr SYM (_Thread_Dispatch)
@@ -375,3 +374,4 @@ SYM (_ISR_Dispatch):
addql #2,a7 | pop format/id
#endif /* M68K_HAS_VBR */
rte
+#endif /* M68K_HAS_SEPARATE_STACKS */
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S
index 8a58831..5692af2 100644
--- a/cpukit/score/cpu/mips/cpu_asm.S
+++ b/cpukit/score/cpu/mips/cpu_asm.S
@@ -1049,7 +1049,7 @@ _ISR_Handler_1:
/*
* prepare to get out of interrupt
- * return from interrupt (maybe to _ISR_Dispatch)
+ * return from interrupt
*
* LABEL "exit interrupt (simple case):"
* prepare to get out of interrupt
diff --git a/cpukit/score/cpu/moxie/cpu_asm.S b/cpukit/score/cpu/moxie/cpu_asm.S
index 080d231..2084214 100644
--- a/cpukit/score/cpu/moxie/cpu_asm.S
+++ b/cpukit/score/cpu/moxie/cpu_asm.S
@@ -87,21 +87,6 @@ SYM(_ISR_Handler):
brk
-/*
- Called from ISR_Handler as a way of ending IRQ
- but allowing dispatch to another task.
- Must use RTE as CCR is still on stack but IRQ has been serviced.
- CCR and PC occupy same word so rte can be used.
- now using task stack
-*/
-
- .align 2
- .global SYM(_ISR_Dispatch)
-
-SYM(_ISR_Dispatch):
- brk
-
-
.align 2
.global SYM(_CPU_Context_save_fp)
diff --git a/cpukit/score/cpu/no_cpu/cpu_asm.c b/cpukit/score/cpu/no_cpu/cpu_asm.c
index 359bee3..a1fbf9c 100644
--- a/cpukit/score/cpu/no_cpu/cpu_asm.c
+++ b/cpukit/score/cpu/no_cpu/cpu_asm.c
@@ -171,9 +171,9 @@ void _ISR_Handler(void)
* goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_necessary ) {
- * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
+ * call _Thread_Dispatch() or prepare to return from interrupt
* prepare to get out of interrupt
- * return from interrupt (maybe to _ISR_Dispatch)
+ * return from interrupt
*
* LABEL "exit interrupt (simple case):
* if outermost interrupt
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c
index cb94b14..78ce269 100644
--- a/cpukit/score/cpu/sparc/cpu.c
+++ b/cpukit/score/cpu/sparc/cpu.c
@@ -412,9 +412,9 @@ void _CPU_Context_Initialize(
/*
* Since THIS thread is being created, there is no way that THIS
- * thread can have an _ISR_Dispatch stack frame on its stack.
+ * thread can have an interrupt stack frame on its stack.
*/
- the_context->isr_dispatch_disable = 0;
+ the_context->isr_dispatch_disable = 0;
if ( tls_area != NULL ) {
void *tcb = _TLS_TCB_after_TLS_block_initialize( tls_area );
diff --git a/cpukit/score/cpu/sparc64/cpu.c b/cpukit/score/cpu/sparc64/cpu.c
index 7eb8098..f39882b 100644
--- a/cpukit/score/cpu/sparc64/cpu.c
+++ b/cpukit/score/cpu/sparc64/cpu.c
@@ -60,7 +60,7 @@ void _CPU_Initialize(void)
/*
* Since no tasks have been created yet and no interrupts have occurred,
* there is no way that the currently executing thread can have an
- * _ISR_Dispatch stack frame on its stack.
+ * interrupt stack frame on its stack.
*/
_CPU_ISR_Dispatch_disable = 0;
}
@@ -100,7 +100,7 @@ void _CPU_Context_Initialize(
/*
* Since THIS thread is being created, there is no way that THIS
- * thread can have an _ISR_Dispatch stack frame on its stack.
+ * thread can have an interrupt stack frame on its stack.
*/
the_context->isr_dispatch_disable = 0;
diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
index 0249023..c25226a 100644
--- a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
@@ -487,7 +487,7 @@ extern Context_Control_fp _CPU_Null_fp_context;
/*
* This flag is context switched with each thread. It indicates
- * that THIS thread has an _ISR_Dispatch stack frame on its stack.
+ * that THIS thread has an interrupt stack frame on its stack.
* By using this flag, we can avoid nesting more interrupt dispatching
* attempts on a previously interrupted thread's stack.
*/
diff --git a/cpukit/score/cpu/sparc64/interrupt.S b/cpukit/score/cpu/sparc64/interrupt.S
index 6f8eb37..d249b39 100644
--- a/cpukit/score/cpu/sparc64/interrupt.S
+++ b/cpukit/score/cpu/sparc64/interrupt.S
@@ -350,8 +350,7 @@ PUBLIC(_ISR_Handler)
/*
* Invoke interrupt dispatcher.
*/
-PUBLIC(_ISR_Dispatch)
- SYM(_ISR_Dispatch):
+
! Set ISR dispatch nesting prevention flag
mov 1, %o1
setx SYM(_CPU_ISR_Dispatch_disable), %o5, %o2
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