[rtems commit] bsp/altera-cyclone-v: Use FDT for clock frequency

Sebastian Huber sebh at rtems.org
Mon Feb 18 07:34:08 UTC 2019


Module:    rtems
Branch:    master
Commit:    af80b0a3406bef73dc6550421947a981c939da27
Changeset: http://git.rtems.org/rtems/commit/?id=af80b0a3406bef73dc6550421947a981c939da27

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Mon Feb 18 08:24:37 2019 +0100

bsp/altera-cyclone-v: Use FDT for clock frequency

---

 bsps/arm/altera-cyclone-v/include/bsp.h            | 6 ++++++
 bsps/arm/altera-cyclone-v/start/bspstart.c         | 7 +++++++
 c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac | 5 ++---
 3 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/bsps/arm/altera-cyclone-v/include/bsp.h b/bsps/arm/altera-cyclone-v/include/bsp.h
index 06e68bb..523f667 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp.h
@@ -43,6 +43,12 @@ extern "C" {
 
 #define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 )
 
+#ifndef BSP_ARM_A9MPCORE_PERIPHCLK
+extern uint32_t altera_cyclone_v_a9mpcore_periphclk;
+#define BSP_ARM_A9MPCORE_PERIPHCLK altera_cyclone_v_a9mpcore_periphclk
+#define ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
+#endif
+
 #define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 )
 
 #define BSP_ARM_L2C_310_BASE 0xfffef000
diff --git a/bsps/arm/altera-cyclone-v/start/bspstart.c b/bsps/arm/altera-cyclone-v/start/bspstart.c
index ac84f54..55a069f 100644
--- a/bsps/arm/altera-cyclone-v/start/bspstart.c
+++ b/bsps/arm/altera-cyclone-v/start/bspstart.c
@@ -93,11 +93,18 @@ static void update_clocks(void)
 }
 #endif
 
+#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
+uint32_t altera_cyclone_v_a9mpcore_periphclk;
+#endif
+
 void bsp_start(void)
 {
 #ifdef BSP_FDT_IS_SUPPORTED
   update_clocks();
 #endif
+#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
+  alt_clk_freq_get(ALT_CLK_MPU_PERIPH, &altera_cyclone_v_a9mpcore_periphclk);
+#endif
   bsp_interrupt_initialize();
   rtems_cache_coherent_add_area(
     bsp_section_nocacheheap_begin,
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac b/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
index 0fa7f66..ad08d92 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac
@@ -42,9 +42,8 @@ RTEMS_BSPOPTS_HELP([BSP_FDT_BLOB_READ_ONLY],[place the FDT blob into the read-on
 RTEMS_BSPOPTS_SET([BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA],[*],[1])
 RTEMS_BSPOPTS_HELP([BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA],[copy the FDT blob into the read-only load area via bsp_fdt_copy()])
 
-RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[altcycv_devkit*],[200000000U])
-RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
-RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
+RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[])
+RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used])
 
 RTEMS_BSPOPTS_SET([CLOCK_DRIVER_USE_FAST_IDLE],[*qemu],[1])
 RTEMS_BSPOPTS_HELP([CLOCK_DRIVER_USE_FAST_IDLE],



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