[rtems commit] score: Rename ScoreCPU Doxygen group

Sebastian Huber sebh at rtems.org
Tue Mar 26 10:28:37 UTC 2019


Module:    rtems
Branch:    master
Commit:    5526527e5111c0fc5b6daaee63edc21f658410a6
Changeset: http://git.rtems.org/rtems/commit/?id=5526527e5111c0fc5b6daaee63edc21f658410a6

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Mon Mar 25 10:45:25 2019 +0100

score: Rename ScoreCPU Doxygen group

Update #3706.

---

 cpukit/include/rtems/score/object.h                              | 2 +-
 cpukit/score/cpu/arm/arm_exc_abort.S                             | 2 +-
 cpukit/score/cpu/arm/arm_exc_interrupt.S                         | 2 +-
 cpukit/score/cpu/arm/cpu.c                                       | 2 +-
 cpukit/score/cpu/arm/cpu_asm.S                                   | 2 +-
 cpukit/score/cpu/arm/include/rtems/asm.h                         | 2 +-
 cpukit/score/cpu/arm/include/rtems/score/arm.h                   | 2 +-
 cpukit/score/cpu/arm/include/rtems/score/cpu.h                   | 6 +++---
 cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h               | 2 +-
 cpukit/score/cpu/epiphany/epiphany-exception-handler.S           | 2 +-
 cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h | 2 +-
 cpukit/score/cpu/mips/include/rtems/score/cpu.h                  | 2 +-
 cpukit/score/cpu/or1k/or1k-exception-handler-low.S               | 2 +-
 cpukit/score/cpu/riscv/riscv-exception-handler.S                 | 2 +-
 cpukit/score/src/objectshrinkinformation.c                       | 1 -
 15 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/cpukit/include/rtems/score/object.h b/cpukit/include/rtems/score/object.h
index 92cfed8..eb21382 100644
--- a/cpukit/include/rtems/score/object.h
+++ b/cpukit/include/rtems/score/object.h
@@ -37,7 +37,7 @@ extern "C" {
 /**@{*/
 
 /**
- * @defgroup ScoreCPU CPU Architecture Support
+ * @defgroup RTEMSScoreCPU CPU Architecture Support
  *
  * @ingroup Score
  *
diff --git a/cpukit/score/cpu/arm/arm_exc_abort.S b/cpukit/score/cpu/arm/arm_exc_abort.S
index 35f08ee..c044c0a 100644
--- a/cpukit/score/cpu/arm/arm_exc_abort.S
+++ b/cpukit/score/cpu/arm/arm_exc_abort.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM data and prefetch abort exception prologue and epilogue.
  */
diff --git a/cpukit/score/cpu/arm/arm_exc_interrupt.S b/cpukit/score/cpu/arm/arm_exc_interrupt.S
index daa7038..5afd12d 100644
--- a/cpukit/score/cpu/arm/arm_exc_interrupt.S
+++ b/cpukit/score/cpu/arm/arm_exc_interrupt.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM interrupt exception prologue and epilogue.
  */
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 63c31a5..fe621a2 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM architecture support implementation.
  */
diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S
index f58b99d..ea6306a 100644
--- a/cpukit/score/cpu/arm/cpu_asm.S
+++ b/cpukit/score/cpu/arm/cpu_asm.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM architecture support implementation.
  */
diff --git a/cpukit/score/cpu/arm/include/rtems/asm.h b/cpukit/score/cpu/arm/include/rtems/asm.h
index f72df32..c868b45 100644
--- a/cpukit/score/cpu/arm/include/rtems/asm.h
+++ b/cpukit/score/cpu/arm/include/rtems/asm.h
@@ -46,7 +46,7 @@
 /**
  * @defgroup ScoreCPUARMASM ARM Assembler Support
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM Assembler Support
  */
diff --git a/cpukit/score/cpu/arm/include/rtems/score/arm.h b/cpukit/score/cpu/arm/include/rtems/score/arm.h
index bff4044..f8a5470 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/arm.h
@@ -25,7 +25,7 @@ extern "C" {
 #endif
 
 /**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
  */
 /**@{**/
 
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index bb8270d..3737246 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -40,7 +40,7 @@
 /**
  * @defgroup ScoreCPUARM ARM Specific Support
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM specific support.
  */
@@ -96,7 +96,7 @@
 #endif /* defined(ARM_MULTILIB_ARCH_V4) */
 
 /**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
  */
 /**@{**/
 
@@ -206,7 +206,7 @@ extern "C" {
 #endif
 
 /**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
  */
 /**@{**/
 
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
index c430911..c910ae6 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief ARM Assembler Support API
  */
diff --git a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
index 23f0947..a65db17 100644
--- a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
+++ b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief Epiphany exception support implementation.
  */
diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
index 04cb2de..bc7ec42 100644
--- a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
+++ b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief This include file contains macros pertaining to the
  *  Epiphany processor family.
diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
index 6818fb4..1cb3198 100644
--- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
@@ -45,7 +45,7 @@
 #define _RTEMS_SCORE_CPU_H
 
 /**
- *  @defgroup ScoreCPU CPU CPU
+ *  @defgroup RTEMSScoreCPU CPU CPU
  *
  *  @ingroup Score
  *
diff --git a/cpukit/score/cpu/or1k/or1k-exception-handler-low.S b/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
index 96d0c8e..cbf69df 100644
--- a/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
+++ b/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief OR1K exception support implementation.
  */
diff --git a/cpukit/score/cpu/riscv/riscv-exception-handler.S b/cpukit/score/cpu/riscv/riscv-exception-handler.S
index 897a15c..ddb8f39 100644
--- a/cpukit/score/cpu/riscv/riscv-exception-handler.S
+++ b/cpukit/score/cpu/riscv/riscv-exception-handler.S
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
  *
  * @brief RISC-V exception support implementation.
  */
diff --git a/cpukit/score/src/objectshrinkinformation.c b/cpukit/score/src/objectshrinkinformation.c
index 964f3f5..9498ea2 100644
--- a/cpukit/score/src/objectshrinkinformation.c
+++ b/cpukit/score/src/objectshrinkinformation.c
@@ -2,7 +2,6 @@
  * @file
  *
  * @brief Shrink an Object Class Information Record
- * @ingroup ScoreCPU
  */
 
 /*



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