[rtems commit] bsp/xilinx-zynq: Simplify linkcmds config

Sebastian Huber sebh at rtems.org
Wed Oct 23 12:20:03 UTC 2019


Module:    rtems
Branch:    master
Commit:    d2efc968e2f644512062de1e06fab20abd2e6854
Changeset: http://git.rtems.org/rtems/commit/?id=d2efc968e2f644512062de1e06fab20abd2e6854

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Wed Oct 23 14:16:47 2019 +0200

bsp/xilinx-zynq: Simplify linkcmds config

Use NULL-pointer protection also for Qemu variant.

Do all calculations in the linker command file.  This is a preparation
for the new build system.

---

 bsps/arm/xilinx-zynq/start/linkcmds.in        |  6 +++---
 c/src/lib/libbsp/arm/xilinx-zynq/configure.ac | 29 +++------------------------
 2 files changed, 6 insertions(+), 29 deletions(-)

diff --git a/bsps/arm/xilinx-zynq/start/linkcmds.in b/bsps/arm/xilinx-zynq/start/linkcmds.in
index b56309b..fb841b9 100644
--- a/bsps/arm/xilinx-zynq/start/linkcmds.in
+++ b/bsps/arm/xilinx-zynq/start/linkcmds.in
@@ -1,9 +1,9 @@
 MEMORY {
    RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@
    RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@
-   RAM_MMU   : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@
-   RAM       : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@
-   NOCACHE   : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@
+   RAM_MMU   : ORIGIN = @ZYNQ_RAM_ORIGIN@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@
+   RAM       : ORIGIN = @ZYNQ_RAM_ORIGIN@ + @ZYNQ_RAM_MMU_LENGTH@, LENGTH = @BSP_ZYNQ_RAM_LENGTH@ - @ZYNQ_RAM_ORIGIN@ - @ZYNQ_RAM_MMU_LENGTH@ - @ZYNQ_RAM_NOCACHE_LENGTH@
+   NOCACHE   : ORIGIN = @BSP_ZYNQ_RAM_LENGTH@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@
 }
 
 REGION_ALIAS ("REGION_START",          RAM);
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
index 8876055..6599b34 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/configure.ac
@@ -73,35 +73,15 @@ RTEMS_BSPOPTS_HELP([BSP_ZYNQ_RAM_LENGTH],[override a BSP's default RAM length])
 RTEMS_BSPOPTS_SET([BSP_ZYNQ_NOCACHE_LENGTH],[*],[1M])
 RTEMS_BSPOPTS_HELP([BSP_ZYNQ_NOCACHE_LENGTH],[length of nocache RAM region])
 
+ZYNQ_RAM_ORIGIN="0x00100000"
 ZYNQ_RAM_MMU_LENGTH="16k"
 ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
 ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
 ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
 ZYNQ_RAM_INT_1_LENGTH="64k - 512"
 
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu],
-      [ZYNQ_RAM_ORIGIN="0x00000000"
-       ZYNQ_RAM_MMU="0x0fffc000"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 16k"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
-      [ZYNQ_RAM_ORIGIN="0x00100000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"])
-
 AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc706],
-      [ZYNQ_RAM_ORIGIN="0x00400000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 4M - 16k"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zedboard],
-      [ZYNQ_RAM_ORIGIN="0x00100000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"])
+      [ZYNQ_RAM_ORIGIN="0x00400000"])
 
 AC_DEFUN([ZYNQ_LINKCMD],[
 AC_ARG_VAR([$1],[$2; default $3])dnl
@@ -109,11 +89,8 @@ AC_ARG_VAR([$1],[$2; default $3])dnl
 ])
 
 ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}])
+ZYNQ_LINKCMD([BSP_ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
 ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQ_RAM_ORIGIN_AVAILABLE}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQ_RAM_LENGTH_AVAILABLE}])
 ZYNQ_LINKCMD([ZYNQ_RAM_NOCACHE_LENGTH],[length of nocache RAM region],[${BSP_ZYNQ_NOCACHE_LENGTH}])
 ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQ_RAM_INT_0_ORIGIN}])
 ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQ_RAM_INT_0_LENGTH}])



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